Patents Represented by Attorney Omkar Suryadevara
  • Patent number: 7465591
    Abstract: A structure having a number of traces passing through a region is evaluated by using a beam of electromagnetic radiation to illuminate the region, and generating an electrical signal that indicates an attribute of a portion (also called “reflected portion”) of the beam reflected from the region. The just-described acts of “illuminating” and “generating” are repeated in another region, followed by a comparison of the generated signals to identify variation of a property between the two regions. Such measurements can identify variations in material properties (or dimensions) between different regions in a single semiconductor wafer of the type used in fabrication of integrated circuit dice, or even between multiple such wafers. In one embodiment, the traces are each substantially parallel to and adjacent to the other, and the beam has wavelength greater than or equal to a pitch between at least two of the traces. In one implementation the beam is polarized, and can be used in several ways, including, e.g.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: December 16, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Peter G Borden, Jiping Li
  • Patent number: 7379185
    Abstract: A patterned dielectric layer is evaluated by measuring reflectance of a region which has openings. A heating beam may be chosen for having reflectance from an underlying conductive layer that is several times greater than absorptance, to provide a heightened sensitivity to presence of residue and/or changes in dimension of the openings. Reflectance may be measured by illuminating the region with a heating beam modulated at a preset frequency, and measuring power of a probe beam that reflects from the region at the preset frequency. Openings of many embodiments have sub-wavelength dimensions (i.e. smaller than the wavelength of the heating beam). The underlying conductive layer may be patterned into links of length smaller than the diameter of heating beam, so that the links float to a temperature higher than a corresponding temperature attained by a continuous trace that transfers heat away from the illuminated region by conduction.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: May 27, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Jiping Li, Edgar Genio
  • Patent number: 7301619
    Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: November 27, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Ji-Ping Li
  • Patent number: 7190458
    Abstract: A semiconductor wafer having two regions of different dopant concentration profiles is evaluated by performing two (or more) measurements in the two regions, and comparing measurements from the two regions to obtain a reflectivity change measure indicative of a difference in reflectivity between the two regions. Analyzing the reflectivity change measure yields one or more properties of one of the regions if corresponding properties of the other region are known. For example, if one of the two regions is doped and the other region is undoped (e.g. source/drain and channel regions of a transistor), then a change in reflectivity between the two regions can yield one or more of the following properties in the doped region: (1) doping concentration, (2) junction or profile depth, and (3) abruptness (i.e. slope) of a profile of dopant concentration at the junction. In some embodiments, the just-described measurements in the two regions are performed by oscillating a spot of a beam of electromagnetic radiation.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: March 13, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Edward W. Budiarto
  • Patent number: 7141440
    Abstract: A property of a layer is measured by: (1) focusing a heating beam on a region (also called “heated region”) of a conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of an optically absorbing layer is approximately equal to (e.g., within 90% of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer. Change in measurement across regions indicates a corresponding change in resistance of the layer.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: November 28, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Ji Ping Li
  • Patent number: 7130055
    Abstract: A coefficient of a function that relates a measurement from a wafer to a parameter used in making the measurement (such as the power of a beam used in the measurement) is determined. The coefficient is used to evaluate the wafer (e.g. to accept or reject the wafer for further processing), and/or to control fabrication of another wafer. In one embodiment, the coefficient is used to control operation of a wafer processing unit (that may include, e.g. an ion implanter), or a heat treatment unit (such as a rapid thermal annealer).
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: October 31, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Regina G. Nijmeijer, Beverly J. Klemme
  • Patent number: 7088444
    Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: August 8, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Ji-Ping Li
  • Patent number: 7078711
    Abstract: A method that is sensitive to lattice damage (also called “primary method”) is combined with an additional method that independently measures one of two parameters to which the primary method is sensitive namely dose and energy. In some embodiments, the additional method is sensitive to dose, and in two such embodiments 4PP and SIMS are respectively used to measure dose (independent of energy). In other embodiments, the additional method is sensitive to energy, and in one such embodiment SIMS is used to measure energy (independent of dose). Use of such an additional method resolves an ambiguity in a prior art measurement by the primary method alone. The two methods are used in combination in some embodiments, to determine adjustments needed to match two or more ion implanters to one another or to a reference ion implanter or to a computer model.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: July 18, 2006
    Assignee: Applied Materials, Inc.
    Inventor: Peter G Borden
  • Patent number: 7064822
    Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. One of the two measurements is of resistance per unit length. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: June 20, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Peter G. Borden, Ji-Ping Li
  • Patent number: 7026175
    Abstract: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: April 11, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Jiping Li, Peter G. Borden, Edgar B. Genio
  • Patent number: 7009695
    Abstract: An area of a substrate is imaged with and without heating, to obtain a hot image and a cold image respectively. The hot and cold images are compared with one another to identify one or more locations as being defective, e.g. if the result of comparison at one location differs significantly relative to other locations. The comparison results in all locations form a differential image, and in several embodiments a number of differential images are obtained by repeatedly heating, imaging and comparing. In such embodiments, multiple differential images are averaged at each location, to improve the signal to noise ratio. Pump and probe lasers may be used for heating and for illumination respectively, or alternatively a single laser may be employed to generate both pump and probe beams.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: March 7, 2006
    Assignee: Applied Materials, Inc.
    Inventor: Daniel I. Some
  • Patent number: 6609229
    Abstract: A programmed computer generates descriptions of circuits (called “checkers”) that flag functional defects in a description of a circuit undergoing functional verification. The programmed computer automatically converts the circuit's description into a graph, automatically examines the graph for instances of a predetermined arrangement of nodes and connections, and automatically generates instructions that flag a behavior of a device represented by the instance in conformance with a known defective behavior. The checkers can be used during simulation or emulation of the circuit, or during operation of the circuit in a semiconductor die The circuit's description can be in Verilog or VHDL and the automatically generated checkers can also be described in Verilog or VHDL. Therefore, the checkers can co-simulate with the circuit, monitoring the simulated operation of the circuit and flagging detective behavior.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: August 19, 2003
    Assignee: O-In Design Automation, Inc.
    Inventors: Tai An Ly, Jean-Charles Giomi, Kalyana C. Mulam, Paul Andrew Wilcox, David Lansing Dill, Paul Estrada, II, Chian-Min Richard Ho, Jing Chyuarn Lin, Robert Kristianto Mardjuki, Lawrence Curtis Widdoes, Jr., Ping Fai Yeung
  • Patent number: 6606735
    Abstract: A method automatically specifies a unique number of an error layer for each DRC rule in a runset. Therefore, all errors related to a given DRC rule are reported by a layout verification tool in the uniquely specified error layer. Furthermore, the method also automatically specifies a unique number of a filter layer that has the same extent as a quality assurance (QA) cell for testing the DRC rule. The filter layer is logically operated (e.g. ANDed) with the error layer to uniquely identify a failure related to the DRC rule (i.e. errors from all other QA cells are filtered out). The QA cells are generated automatically by use of a library of templates. During regression testing, the first time a DRC runset is run against a test design or QA cell library the results are manually verified and stored as “expected” results.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: August 12, 2003
    Assignee: Synopsys, Inc.
    Inventors: Guy R. Richardson, Dana M. Rigg
  • Patent number: 6568133
    Abstract: An outdoor enclosure including a main compartment housing electronic components and a door coupled to the main compartment. A beverage holder tray is mounted on an inner surface of the door. The beverage holder tray may be folded into a closed position and unfolded into an open position.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: May 27, 2003
    Assignee: Calix Networks, Inc.
    Inventor: Jane Rodgers
  • Patent number: 6493866
    Abstract: For phase-shifting microlithography, a method of assigning phase to a set of shifter polygons in a mask layer separated by a set of target features includes assigning a first phase to a first shifter polygon, identifying a set of target features that touch the first shifter polygon, and assigning a second phase to all shifter polygons in the set that touch the set of target features in contact with the first shifter polygon. The set of shifter polygons and the set of target features are separated into aggregates that are spatially isolated from each other such that the phase assignment in one aggregate does not affect the phase assignments in other aggregates.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: December 10, 2002
    Assignee: Synopsys, Inc.
    Inventor: Jeffrey P. Mayhew
  • Patent number: 6489801
    Abstract: An apparatus and method uses diffusive modulation (without generating a wave of carriers) for measuring a material property (such as any one or more of: mobility, doping, and lifetime) that is used in evaluating a semiconductor wafer. The measurements are carried out in a small area, for use on wafers having patterns for integrated circuit dice. The measurements are based on measurement of reflectance, for example as a function of carrier concentration. In one implementation, the semiconductor wafer is illuminated with two beams, one with photon energy above the bandgap energy of the semiconductor, and another with photon energy near or below the bandgap. The diameters of the two beams relative to one another are varied to extract additional information about the semiconductor material, for use in measuring, e.g. lifetime.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: December 3, 2002
    Inventors: Peter G. Borden, Regina G. Nijmeijer, Jiping Li
  • Patent number: 6483594
    Abstract: A method (1) creates charge carriers in a concentration that changes in a periodic manner (also called “modulation”) only with respect to time, and (2) determines the number of charge carriers created in the carrier creation region by measuring an interference signal obtained by interference between a reference beam and a portion of a probe beam that is reflected by charge carriers at various depths of the semiconductor material, and comparing the measurement with corresponding values obtained by simulation (e.g. in graphs of such measurements for different junction depths). Various properties of the reflected portion of the probe beam (such as power and phase) are functions of the depth at which the reflection occurs, and can be measured to determine the depth of the junction, and the profile of active dopants.
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: November 19, 2002
    Assignee: Boxer Cross, INC
    Inventors: Peter G. Borden, Regina G. Nijmeijer
  • Patent number: 6429984
    Abstract: An apparatus and method write data to a storage medium, and subsequently automatically refresh the data to avoid loss of the data due to spontaneous thermal degradation. The apparatus and method may check whether an indicator (also called “refresh indicator”) if saved contemporaneous with writing of the data satisfies a predetermined condition indicating that the data needs to be refreshed. If so, a “refresh” operation is performed, wherein the to-be-refreshed data is read from and written back to the same storage medium. The refresh indicator can be any parameter that indicates a need to refresh the data prior to occurrence of one or more soft errors. In one example, the apparatus and method read the data back contemporaneous with writing of the data, and measure an amplitude of a readback signal and store, as the refresh indicator, a predetermined fraction (e.g. half) of the measured value (i.e., a threshold number).
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: August 6, 2002
    Assignee: Komag, INC
    Inventor: Michael Alex
  • Patent number: 6426644
    Abstract: A method (1) creates charge carriers in a concentration that changes in a periodic manner (also called “modulation”) only with respect to time, and (2) determines the umber of charge carriers created in the carrier creation region by measuring an interference signal obtained by interference between a reference beam and a portion of a probe beam that is reflected by charge carriers at various depths of the semiconductor material, and comparing the measurement with corresponding values obtained by simulation (e.g. in graphs of such measurements for different junction depths). Various properties of the reflected portion of the probe beam (such as power and phase) are functions of the depth at which the reflection occurs, and can be measured to determine the depth of the junction, and the profile of active dopants.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: July 30, 2002
    Assignee: Boxer Cross Inc.
    Inventors: Peter G. Borden, Regina G. Nijmeijer