Patents Represented by Attorney Orick, Herrington & Sutcliffe LLP
  • Patent number: 8056104
    Abstract: Apparatus, methods, and systems for centrally and uniformly controlling the operation of a variety of devices, such as communication, consumer electronic, audio-video, analog, digital, 1394, and the like, over a variety of protocols within a network system and, more particularly, a control system and uniform user interface for centrally controlling these devices in a manner that appears seamless and transparent to the user. In a preferred embodiment, a command center or hub of a network system includes a context and connection permutation sensitive control system that enables centralized and seamless integrated control of all types of input devices. The control system preferably includes a versatile icon based graphical user interface that provides a uniform, on-screen centralized control system for the network system.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: November 8, 2011
    Assignee: Mitsubishi Electric Visual Solutions America, Inc.
    Inventors: Polly Stecyk, Brian Peterson, Brian Maxson, Pavel Houda, George E. Palmer, Shenta T. Pu, Martin Zanfino, Robert A. Perry
  • Patent number: 7487420
    Abstract: A logic failure diagnosis system for performing logic failure diagnosis and methods for manufacturing and using same. The logic failure diagnosis system includes a signature register system and a space compaction system and, during testing, receives data values from a predetermined number of scan chains. During each scan cycle, the signature register system combines a set of data values with a set of recirculated data values to provide a set of data signature values. The signature register system recirculates the data signature values from the preceding scan cycle to provide the recirculated data values. The space compaction system compresses the data signature values to provide a compressed scan chain signature for the scan chains. The compressed scan chain signature can be compared with a set of expected values to determine whether the scan chains include any erroneous values and, if so, to identify a source of the erroneous values.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: February 3, 2009
    Assignee: Cadence Design Systems Inc.
    Inventor: Brion Keller