Abstract: A method and means which upon detecting indicia embedded in a decoded run length coded bit string skips over a range of bit memory mapped addresses thus reducing the number of write operations into a counterpart bit mapped memory. The coded indicia include portions which specify a skip and a skip range for storage locations in said bit mapped memory.
Type:
Grant
Filed:
March 16, 1993
Date of Patent:
June 6, 1995
Assignee:
International Business Machines Corporation
Inventors:
Yutaka Aoki, Yuji Gohda, Darwin P. Rackley
Abstract: An improved architecture for a Prolog interpreter/compiler is described to facilitate interrupt processing. The new architecture employs interrupt control words and a set of interrupt control blocks to enhance Prolog processing. As interrupts are detected, an interrupt control word is loaded with the address of an interrupt control block for managing interrupt processing. Then, each time a new predicate is fired, the interrupt control word is tested and control is passed to the interrupt processing routine if the control word is non-zero.
Type:
Grant
Filed:
June 1, 1992
Date of Patent:
March 7, 1995
Assignee:
International Business Machines Corporation
Abstract: An improved technique for processing Prolog objects is described. The first bit of the Prolog object word is used as a flag to indicate whether the object word is a type pointer or type descriptor. If the one-bit flag indicates that the object word is a type pointer, then the address is available for immediate processing without the unnecessary processing associated with the prior art.
Type:
Grant
Filed:
August 27, 1992
Date of Patent:
January 31, 1995
Assignee:
International Business Machines Corporation