Patents Represented by Attorney Park, Vaughan & Fleming, LLP
  • Patent number: 7681172
    Abstract: One embodiment of the present invention provides a system that accurately predicts an apodization effect in an optical lithography system for manufacturing an integrated circuit. During operation, the system starts by collecting an apodization-effect-induced spatial transmission profile from the optical lithography system. The system then constructs an apodization model based on the spatial transmission profile. Next, the system enhances a lithography model for the optical lithography system by incorporating the apodization model into the lithography model, wherein the enhanced lithography model accurately predicts the effects of apodization on the optical lithography system.
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: March 16, 2010
    Assignee: Synopsys, Inc.
    Inventors: Qiaolin Zhang, Paul VanAdrichem, Laurent Depre, Qiliang Yan
  • Patent number: 7681188
    Abstract: One embodiment of the present invention provides a system that facilitates locked prefetch scheduling in general cyclic regions of a computer program. The system operates by first receiving a source code for the computer program and compiling the source code into intermediate code. The system then performs a trace detection on the intermediate code. Next, the system inserts prefetch instructions and corresponding locks into the intermediate code. Finally, the system generates executable code from the intermediate code, wherein a lock for a given prefetch instruction prevents subsequent prefetches from being issued until the data value returns for the given prefetch instruction.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: March 16, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Partha P. Tirumalai, Spiros Kalogeropulos, Yonghong Song
  • Patent number: 7680142
    Abstract: A communications chip having a plurality of ports. Each port is provided with an interface for attachment to an external communications facility to exchange data traffic. There is also a switching matrix for routing data traffic on the chip between the ports. The chip further includes a plurality of logic analyzers. Each logic analyzer is associated with a corresponding one of the ports. Each logic analyzers is operable to monitor data traffic passing through its corresponding port and to trigger on one or more predetermined conditions relating to the monitored data traffic. The chip further includes a control interface to allow reconfiguration of the predetermined conditions for at least one of the logic analyzers.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: March 16, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Knut Tvete, Hans Rygh, Bjorn Dag Johnsen
  • Patent number: 7680741
    Abstract: One embodiment of the present invention provides a system for using retail authorization to reduce the initial value of a software product. During operation, the system receives an initial bill for an un-activated version of the software product. Because this un-activated version is not fully functional, it has a lower value than a functional version of the software product, and hence the initial bill charges for a lower initial cost. During the sale of an un-activated version of the software product, the system activates the un-activated version from a point of sale system. After the sale, the system receives an additional bill for activating the software product.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: March 16, 2010
    Assignee: Intuit Inc.
    Inventors: Richard W. Cook, Timothy A. Rosemore, Andrew A. Woods, Jennifer Possin, Edmund Y. L. Sung
  • Patent number: 7679872
    Abstract: Embodiments of an interface circuit are described. This interface circuit includes an input pad, a control node and a transistor, which has three terminals. A first terminal is electrically coupled to the input pad and a second terminal is electrically coupled to the control node. Moreover, the interface circuit includes a micro-electromechanical system (MEMS) switch, which is electrically coupled to the input pad and the control node, where the MEMS switch is in parallel with the transistor. In the absence of a voltage applied to a control terminal of the MEMS switch, the MEMS switch is closed, thereby electrically coupling the input pad and the control node. Furthermore, when the voltage is applied to the control terminal of the MEMS switch, the MEMS switch is open, thereby electrically decoupling the input pad and the control node.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: March 16, 2010
    Assignee: Synopsys, Inc.
    Inventors: Jamil Kawa, Subarnarekha Sinha, Min-Chun Tsai, ZongWu Tang, Qing Su
  • Patent number: 7681166
    Abstract: An embodiment performs dummy fill in a design layout to achieve a target density that is within a narrow range of target densities. During operation, the system can receive a design layout that includes a region whose density is not within a desired range of target densities. Next, the system can receive a set of dummy-fill cells which can be used to place a dummy-fill array to fill an arbitrarily sized rectangle. The set of dummy-fill cells may contain assist features and optical proximity corrections which cause the dummy shapes to print properly regardless of the size of the dummy-fill array. The system may then determine a polygon in the design layout to fill with dummy-fill cells. Next, the system may fracture the polygon into a set of rectangles. The system may use the set of dummy-fill cells to place a dummy-fill array that fills a rectangle.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 16, 2010
    Assignee: Synopsys, Inc.
    Inventors: Paulus J. M. van Adrichem, Denis L. Goinard
  • Patent number: 7681164
    Abstract: A system that places an integrated circuit (IC) device within an IC chip layout is presented. During operation, the system receives the IC device to be placed within the IC chip layout, wherein the IC chip layout includes one or more continuous rows of diffusion. Next, the system places the IC device within a continuous row of diffusion. The system then determines whether the IC device is to be electrically isolated from other IC devices. If so, the system inserts one or more isolation devices within the continuous row of diffusion so that the IC device can be electrically isolated from other IC devices. The system then biases the one or more isolation device so that the IC device is electrically isolated from other IC devices within the continuous row of diffusion.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: March 16, 2010
    Assignee: Synopsys, Inc.
    Inventors: Xi-Wei Lin, Victor Moroz
  • Patent number: 7680624
    Abstract: One embodiment of the present invention provides a system that performs a real-time root-cause-analysis for a degradation event associated with a component under test. During operation, the system monitors a telemetry signal collected from the component, and while doing so, attempts to detect an anomaly in the telemetry signal. If an anomaly is detected in the telemetry signal, the system performs a failure analysis on the telemetry signal in real-time while the telemetry signal is degrading. Next, the system identifies a failure mechanism for the component based on the failure analysis.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: March 16, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: David K. McElfresh, Dan Vacar, Kenny C. Gross, Leoncio D. Lopez
  • Patent number: 7675857
    Abstract: One embodiment of the present invention provides a system that avoids network congestion. During operation, the system can detect an onset of congestion in a first queue at a first node. Next, the first node can generate a first control-message, wherein the first control-message contains a congestion-point identifier which is associated with the first queue. The first node can then send the first control-message to a second node, which can cause the second node to delay sending a second message to the first node, wherein the second message is expected to be routed through the first queue at the first node. Next, the second node may propagate the control-message to a third node which may cause the third node to delay sending a third message to the second node, wherein the third message is expected to be routed through the first queue at the first node.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: March 9, 2010
    Assignee: Google Inc.
    Inventor: Gregory L. Chesson
  • Patent number: 7676636
    Abstract: Embodiments of the present invention implement virtual transactional memory using cache line marking. The system starts by executing a starvation-avoiding transaction for a thread. While executing the starvation-avoiding transaction, the system places starvation-avoiding load-marks on cache lines which are loaded from and places starvation-avoiding store-marks on cache lines which are stored to. Next, while swapping a page out of a memory and to a disk during the starvation-avoiding transaction, the system determines if one or more cache lines in the page have a starvation-avoiding load-mark or a starvation-avoiding store-mark. If so, upon swapping the page into the memory from the disk, the system places a starvation-avoiding load-mark on each cache line that had a starvation-avoiding load-mark and places a starvation-avoiding store-mark on each cache line that had a starvation-avoiding store-mark.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: March 9, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert E. Cypher, Shailender Chaudhry, Anders Landin
  • Patent number: 7676630
    Abstract: A system that caches a file within a computer system. During operation, the system monitors accesses to the file, wherein the file is located on a storage device. Next, the system analyzes the monitored accesses to determine an access pattern for the file. The system then uses the determined access pattern to adjust a caching policy for the file.
    Type: Grant
    Filed: October 5, 2006
    Date of Patent: March 9, 2010
    Assignee: Sun Microsystems, Inc.
    Inventor: Donghai Qiao
  • Patent number: 7673064
    Abstract: Apparatus, methods, and program products that present commentary audio in conjunction with an experiential data stream by detecting proximity of a playback position to an audio trigger position associated with a commentary audio clip and presenting the commentary audio clip accordingly.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: March 2, 2010
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Nicolas Ducheneaut, Eric S. Nickell, James D. Thornton, Daniel G. Bobrow
  • Patent number: 7672808
    Abstract: Some embodiments of the present invention provide a system that determines a center of rotation for a component in a computer system. During operation, the system measures a first acceleration of a first location on the component and a second acceleration of a second location on the component, wherein the first location and the second location are separated by a predetermined distance. Then, the system determines the center of rotation using the first acceleration, the second acceleration, and the predetermined distance.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: March 2, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Anton A. Bougaev, David K. McElfresh, Kenny C. Gross, Aleksey M. Urmanov
  • Patent number: 7672235
    Abstract: One embodiment provides a system and method for synchronously buffering real-time streaming content in a peer-to-peer overlay network to improve inter-peer-node synchronization. A requesting peer node identifies a partner peer node that transiently stages content segments. The requesting peer node determines the status of its local buffer and sends a request that indicates such status to a partner peer node. After receiving the most recent segment not present in the buffer from the partner peer node, the requesting peer node transiently stages the received segments in the buffer.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: March 2, 2010
    Assignee: Roxbeam Media Network Corporation
    Inventors: Chenghui Lian, Fang Dong
  • Patent number: 7671449
    Abstract: One embodiment of the present invention provides a system that facilitates high-bandwidth communication using a flexible bridge. This system includes a chip with an active face upon which active circuitry and signal pads reside, and a second component with a surface upon which active circuitry and/or signal pads reside. A flexible bridge provides high-bandwidth communication between the active face of the chip and the surface of the second component. This flexible bridge provides a flexible connection that allows the chip to be moved with six degrees of freedom relative to the second component without affecting communication between the chip and the second component. Hence, the flexible bridge allows the chip and the second component to communicate without requiring precise alignment between the chip and the second component.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: March 2, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Arthur R. Zingher, Bruce M. Guenin, Ronald Ho, Robert J. Drost
  • Patent number: 7673193
    Abstract: An apparatus and method for a processor-memory unit for use in system-in-package (SiP) and system-in-package (SiP) integrated circuit devices. The apparatus includes a processing module, a memory module and a programmable system module. The programmable system module is configured to function as an interface between the memory module and the processing module, or as an interface between the memory module and a testing device. The invention facilitates integration and testing of processor-memory units including functional components having different communication protocols.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: March 2, 2010
    Assignee: Rambus Inc.
    Inventors: Adrian E. Ong, Naresh Baliga
  • Patent number: 7668903
    Abstract: One embodiment of the present invention provides a system that facilitates dynamic delivery of service profiles to a client. During operation, the system performs a discovery operation to allow the client to discover new services on a network. If a new service is discovered for which the client does not possess a service profile, the client to obtains the service profile from the new service and subsequently installs it, thereby enabling the client to interact with the new service.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: February 23, 2010
    Assignee: Xerox Corporation
    Inventors: Warren Keith Edwards, Mark Webster Newman, Trevor Fredrick Smith, Jana Zdislava Sedivy, Karen Marcelo, Shahram Izadi, Jason I. Hong
  • Patent number: 7668244
    Abstract: A system for receiving data on a communication channel. The system examines the state of a bit that was previously received on the channel. If the state of the previously received bit was high, the system looks for a falling edge while receiving a subsequent bit on the channel. Otherwise, the system looks for a rising edge while receiving the subsequent bit on the channel. While looking for a rising edge or looking for a falling edge, the system samples a signal on the channel at discrete time steps within a symbol interval, wherein the symbol interval is a time period during which the signal can change states. The specific discrete time step at which the signal changes state is associated with a specific decoded output symbol. Note that the signal can also convey information by not changing states.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: February 23, 2010
    Assignee: Apple Inc.
    Inventor: William P. Cornelius
  • Patent number: 7669040
    Abstract: A system that executes a long transaction in a system with limited transactional hardware resources. During operation, the system executes the long transaction in a non transactional mode, which does not use transactional hardware resources. The system defers stores generated during the long transaction so that the stores are not committed to the architectural state of a processor until the transaction is successfully completed. If the long transaction successfully completes, the system commits the long transaction, which involves performing multiple hardware transactions to commit the deferred stores to the architectural state of the processor.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: February 23, 2010
    Assignee: Sun Microsystems, Inc.
    Inventor: David Dice
  • Patent number: 7668696
    Abstract: A system that monitors the health of a computer system is presented. During operation, the system receives a first-difference function for the variance of a time series for a monitored telemetry variable within the computer system. The system then determines whether the first-difference function indicates that the computer system is at the onset of degradation. If so, the system performs a remedial action.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: February 23, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Kenny C. Gross, David McElfresh, Dan Vacar