Patents Represented by Attorney, Agent or Law Firm Park & Vaughn LLP
  • Patent number: 6189049
    Abstract: One embodiment of the present invention provides a method that maintains status information for peripheral devices in a status register, which is located within a central processing unit in the computer system. In this embodiment, a peripheral device updates the status register if its status changes by performing a bus master operation to transfer status information to the status register. It then generates an interrupt to indicate to a processor that it requires servicing. When the processor services the interrupt, the processor performs an internal read of the status register to determine which peripheral device requires processing. No time-consuming polling of peripheral devices is required to determine the status of the peripheral devices.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: February 13, 2001
    Assignee: Micron Technology
    Inventor: Dean A. Klein
  • Patent number: 6167517
    Abstract: One embodiment of the present invention provides a method for authenticating an identity of a user in order to secure access to a host system. In this embodiment, the host system receives an identifier for the user from a client system. This identifier is used to retrieve a template containing biometric data associated with the user, and this template is returned to the client. The client then gathers a biometric sample from the user, and compares this biometric sample with the template to produce a comparison result. Next, the client computes a message digest using the template, the comparison result and an encryption key, and sends the message digest to the host system. This computation takes places within a secure hardware module within the client computing system that contains a secure encryption key in order to guard against malicious users on the client system.
    Type: Grant
    Filed: April 9, 1998
    Date of Patent: December 26, 2000
    Assignee: Oracle Corporation
    Inventors: Gary Gilchrist, Steven D. Viavant
  • Patent number: 6148417
    Abstract: One embodiment of the present invention provides a method for determining a source of failure during a failed file access in a computer system. This method generates a sequence of file references from a first location in the computer system, and maintains a record of parameters specifying the sequence of file references. The results of the sequence of file references are examined to detect a failure during a file reference. If a failure is detected, the failed file reference is reconstructed using the record of parameters, and is then retried to determine the source of failure. In between retries, the method allows various system components to be manipulated to isolate the source of failure. In one embodiment, these manipulations include: replacing hardware components; replacing system firmware; replacing software components; and inserting debug code into a program on the computer system.
    Type: Grant
    Filed: January 14, 1998
    Date of Patent: November 14, 2000
    Assignee: Micron Electronics, Inc.
    Inventor: Luis A. da Silva
  • Patent number: 6038572
    Abstract: Apparatus, methods, systems and computer program products are disclosed describing processes that optimize generational garbage collection techniques in a card-marked heap. The invention localizes nodes in an older generation that have a pointer to a newer generation. This node localization increases the density of such nodes in the cards marked as having these nodes and thus reduces the number of marked cards that need to be examined for nodes having pointers to the newer generation.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: March 14, 2000
    Assignee: Sun Microsystems, Inc.
    Inventors: David C. Schwartz, Ross C. Knippel
  • Patent number: 6031787
    Abstract: One embodiment of the present invention provides a memory system that allows more than one cycle of memory latency for accesses to a synchronously accessed memory. In this embodiment, the memory system includes a memory with a clocked interface and a corresponding clock input. It also includes an output register for storing data outputted from the memory during a read operation. The output register and the memory are coupled together by a data path, for transferring data between the memory and the output register. In this embodiment, the memory system further includes a clock signal coupled to the clocked interface of the memory. The clock signal feeds through a delay element into a clock input of the output register. This causes the output register to receive a delayed clock signal, thereby providing more than one clock cycle of time for data to be read from the memory and latched in the output register.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: February 29, 2000
    Assignee: Micron Electronics
    Inventor: Joseph M. Jeddeloh