Patents Represented by Attorney Patentability Associates
  • Patent number: 8315144
    Abstract: A small form factor disc drive is structured to hold and play an optical data storage disc measuring approximately 32 mm in diameter and containing 1 GB of data per layer. The disc drive contains a blue wavelength laser, an objective lens having a numerical aperture in the range of 0.70-0.78 and conventional DVD-compatible controller electronics. This unique combination of elements allows a full-length movie or a video game to be displayed with DVD-quality on a cell phone or other portable hand held device.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: November 20, 2012
    Assignee: VMO Systems Inc.
    Inventors: Jerry E. Hurst, Jr., Neil Deeman, Steven B. Volk
  • Patent number: 8278887
    Abstract: A DC/DC converter including an inductor and a capacitor is started by connecting an input voltage to the inductor and shunting a current around the inductor so as to pre-charge the capacitor to a predetermined voltage.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: October 2, 2012
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Patent number: 8277919
    Abstract: An optical disc includes a substrate layer, a cover layer, and an aluminum alloy layer that is between the substrate layer and cover layer, and is adjacent to the substrate layer. The aluminum alloy layer includes a majority amount of aluminum and an additional metal selected from the group consisting of: chromium, titanium, tantalum, and any combination thereof. A method of making an optical disc includes the steps of: forming a substrate layer; sputtering an aluminum alloy target onto the substrate layer to form an aluminum alloy layer; and forming a cover layer; wherein the aluminum alloy layer comprises a majority amount of aluminum and an additional metal selected from the group consisting of: chromium, titanium, tantalum, and any combination thereof.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: October 2, 2012
    Assignee: VMO Systems, Inc.
    Inventors: Neil Deeman, Jerry E. Hurst, Jr.
  • Patent number: 8258575
    Abstract: A lateral MOSFET formed in a substrate of a first conductivity type includes a gate formed atop a gate dielectric layer over a surface of the substrate, a drain region of a second conductivity type, a source region of a second conductivity type, and a body region of the first conductivity type which extends under the gate. The body region may have a non-monotonic vertical doping profile with a portion located deeper in the substrate having a higher doping concentration than a portion located shallower in the substrate. The lateral MOSFET is drain-centric, with the source region and a dielectric-filled trench surrounding the drain region.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: September 4, 2012
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Patent number: 8256022
    Abstract: An air deflector is mounted to the area of the knee of a motorcyclist to prevent a stream of air from striking the motorcyclist's face. In one embodiment, the deflector comprises a deflector plate and a mounting plate connected by a hinge mechanism. When the motorcycle is in motion, the air flow impacts the deflector plate, forcing the deflector to extend upward until a support web restrains the deflector plate.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: September 4, 2012
    Inventor: Jerry H. Bigalke
  • Patent number: 8230452
    Abstract: A miniature optical disc drive includes a DVD-compatible optical controller and a cartridge load module designed to hold a cartridge containing a 32 mm optical data storage disc.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: July 24, 2012
    Assignee: VMO Systems, Inc.
    Inventors: Steven B. Volk, Jerry E. Hurst, Jr.
  • Patent number: 8148758
    Abstract: A high-voltage field-effect device contains an extended drain or “drift” region including an embedded stack of JFET regions separated by intervening layers of the drift region. Each of the JFET regions is filled with material of an opposite conductivity type to that of the drift region, and the floor and ceiling of each JFET region is lined with an oxide layer. When the device is blocking a voltage in the off condition, the semiconductor material inside the JFET regions and in the drift region that separates the JFET regions is depleted. This improves the voltage-blocking ability of the device while conserving chip area. The oxide layer prevents dopant from the JFET regions from diffusing into the drift region.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: April 3, 2012
    Assignee: Alpha and Omega Semiconductor Inc.
    Inventor: Hamza Yilmaz
  • Patent number: 8138570
    Abstract: An isolation structure for a semiconductor device comprises a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This structure provides a relatively deep isolated pocket in a semiconductor substrate while limiting the depth of the trench that must be etched in the substrate. An isolated junction field-effect transistor is formed in the isolated pocket.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: March 20, 2012
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Patent number: 8127369
    Abstract: An air deflector is mounted to the area of the knee of a motorcyclist to prevent a stream of air from striking the motorcyclist's face. In one embodiment, the deflector is in the form of a cap visor.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: March 6, 2012
    Inventor: Jerry H. Bigalke
  • Patent number: 8129229
    Abstract: A metal leadframe to be used in manufacturing a “flip-chip” type semiconductor package is treated to form a metal plated layer in an area to be contacted by a solder ball or bump on the chip. The leadframe is then process further to form an oxide or organometallic layer around the metal plated layer. Pretreating the leadframe in this manner prevents the solder from spreading out during reflow and maintains a good standoff distance between the chip and leadframe. During the molding process, the standoff between the chip and leadframe allows the molding compound to flow freely, preventing voids in the finished package.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: March 6, 2012
    Assignee: UTAC Thai Limited
    Inventors: Saravuth Sirinorakul, Somchai Nondhasitthichai
  • Patent number: 8097522
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: January 17, 2012
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan, Jun-Wei Chen, HyungSik Ryu
  • Patent number: 8089129
    Abstract: Isolated CMOS transistors formed in a P-type semiconductor substrate include an N-type submerged floor isolation region and a filled trench extending downward from the surface of the substrate to the floor isolation region. Together the floor isolation region and the filled trench form an isolated pocket of the substrate which contains a P-channel MOSFET in an N-well and an N-channel MOSFET in a P-well. The substrate does not contain an epitaxial layer, thereby overcoming the many problems associated with fabricating the same.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: January 3, 2012
    Assignee: Advanced Analogic Technologies, Inc.
    Inventors: Donald R. Disney, Richard K. Williams
  • Patent number: 8071462
    Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: December 6, 2011
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Patent number: 8035364
    Abstract: A freewheeling DC/DC step-down converter includes a high-side MOSFET, an inductor and an output capacitor connected between the input voltage and ground. A freewheeling clamp, which includes a freewheeling MOSFET and diode, is connected across the inductor. When the high-side MOSFET is turned off, a current circulates through the inductor and freewheeling clamp rather than to ground, improving the efficiency of the converter. The converter has softer diode recovery and less voltage overshoot and noise than conventional Buck converters and features unique benefits during light-load conditions.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: October 11, 2011
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Patent number: 8030152
    Abstract: A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 4, 2011
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Michael E. Cornell, Wai Tien Chan
  • Patent number: 8032004
    Abstract: A format for accessing content such as a full-length move from an optical disc uses an XML description file stored on the disc to generate one or more screens that a user employs to access the content. The decoding requirements of a hardware or software player are reduced by discarding specific elements of an encoding standard such as MPEG4 that is used to encode the content on the disc. The maximum average and peak bitrates at which the data is transferred are limited to further reduce the demands on the player.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: October 4, 2011
    Assignee: Vmedia Research, Inc.
    Inventors: Dagan Packman, Steven Bernard Volk, Jerry E. Hurst, Jr., Alan Fennema
  • Patent number: 8030731
    Abstract: An isolated diode comprises a floor isolation region, a dielectric-filled trench and a sidewall region extending from a bottom of the trench at least to the floor isolation region. The floor isolation region, dielectric-filled trench and a sidewall region are comprised in one terminal (anode or cathode) of the diode and together form an isolated pocket in which the other terminal of the diode is formed. In one embodiment the terminals of the diode are separated by a second dielectric-filled trench and sidewall region.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: October 4, 2011
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong) Limited
    Inventors: Richard K. Williams, Donald Ray Disney, Wai Tien Chan
  • Patent number: 7994827
    Abstract: A gate driver for a power MOSFET in, for example, a DC-DC converter switches the MOSFET between a fully-on condition and a low-current condition instead of switching the MOSFET between fully-on and fully-off conditions. The amount of charge that must be transferred to charge and discharge the gate of the MOSFET is thereby reduced, and the efficiency of the MOSFET is improved. A trimming process is used to adjust the magnitude of the voltage supplied by the gate driver to the gate of the power MOSFET in the low-current condition.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: August 9, 2011
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams
  • Patent number: 7994578
    Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 9, 2011
    Assignees: Advanced Analogic Technologies, Inc., Advanced Analogic Technologies (Hong Kong)
    Inventors: Donald Ray Disney, Jun-Wei Chen, Richard K. Williams, HyungSik Ryu, Wai Tien Chan
  • Patent number: 7994605
    Abstract: Isolation regions for semiconductor substrates include dielectric-filled trenches and field oxide regions. Protective caps of dielectric materials dissimilar from the dielectric materials in the main portions of the trenches and field oxide regions may be used to protect the structures from erosion during later process steps. The top surfaces of the isolation structures are coplanar with the surface of the substrate. Field doping regions may be formed beneath the field oxide regions. To meet the demands of different devices, the isolation structures may have varying widths and depths.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: August 9, 2011
    Assignee: Advanced Analogic Technologies, Inc.
    Inventor: Richard K. Williams