Abstract: An electrostatic discharge (ESD) protection circuit for an IC device including a triple-well SCR and a control circuit connected between the triple-well SCR and ground. The triple-well SCR is implemented using triple-well CMOS technology to facilitate connection of the control circuit by isolating both terminals of the triple-well SCR from ground. The control circuit includes a switch circuit, a capacitor, or a combination thereof, for controlling the holding voltage of the triple-well SCR. The switch circuit is closed during non-operation (i.e., before power is applied to the IC device protected by the SCR) so that electrostatic discharge (ESD) energy is transmitted to ground through the triple-well SCR. Similarly, the capacitor transmits ESD pulses to ground during ESD events. During normal operation of the IC device, the switch circuit is controlled by system voltage to remain open.

Abstract: A method for programming PLDs in which feedback signals are alternately programmed to produce counteractive switching signals in the interconnect matrix to reduce the coupling effect caused by multiple concurrent switching events. The method is applied to CPLDs having interconnect matrices including input lines and output lines connected by programmable connection circuits, and having macrocells connected at their output to one of the input lines via first selective inversion circuits, and connected at their input to the output lines via second selective inversion circuits.