Abstract: A transmitter and method is provided for digitally upconverting a baseband digital signal to a modulated intermediate frequency (IF) digital signal and sigma-delta modulating the IF digital signal. The baseband digital signal is split into N phases, as can be accomplished using a polyphase interpolation technique (polyphase filter), and modulated. The modulated N phases are not recombined and each phase is further modulated, as can be accomplished using a digital-to-digital sigma-delta modulator that generates digital output signals at the same rate. A high speed digital multiplexer multiplexes the digital output signals into a single bit stream at a higher rate for subsequent power amplification and RF transmission.

Abstract: Methods and apparatus are provided for efficiently combining and filtering a plurality of input signals into a single combined output signal. M number of input signals are received, combined and filtered by a filter/combiner. The filter/combiner has a plurality of input stages for each input signal, and an output stage that combines the outputs of the input stages into the combined signal. The filter/combiner has a desired overall filter transfer function designed to filter signals having frequencies outside a passband and which passes the desired M input signals.

Abstract: A receiver and method is provided for sigma-delta converting an RF signal to a digital signal and downconverting to a digital baseband signal. The RF signal is split into N phases, as can be accomplished using a sample and hold circuit, and each phase is digitized, as can be accomplished using an analog-to-digital (A/D) sigma-delta converter. Polyphase decimation techniques and demodulation are applied to the phased signals to generate a demodulated digital signal. The demodulated digital signal is further downconverted to the appropriate baseband signal.

Abstract: Methods and apparatus are provided for efficiently combining and filtering a plurality of input signals into a single combined output signal. M number of input signals are received, combined and filtered by a filter/combiner. The filter/combiner has a plurality of input stages for each input signal, and an output stage that combines the outputs of the input stages into the combined signal. The filter/combiner has a desired overall filter transfer function designed to filter signals having frequencies outside a passband and which passes the desired M input signals.

Abstract: A transmitter and method is provided for digitally upconverting a baseband digital signal to a modulated intermediate frequency (IF) digital signal and sigma-delta modulating the IF digital signal. The baseband digital signal is split into N phases, as can be accomplished using a polyphase interpolation technique (polyphase filter), and modulated. The modulated N phases are not recombined and each phase is further modulated, as can be accomplished using a digital-to-digital sigma-delta modulator that generates digital output signals at the same rate. A high speed digital multiplexer multiplexes the digital output signals into a single bit stream at a higher rate for subsequent power amplification and RF transmission.

Abstract: During a telephone call, a party to the call may signal (by, for example, sending certain DTMF tones (a wish to provide his or her location to the other party to the call. The central office responds to this request by accessing a subscriber record for the communication line (e.g., subscriber loop) terminating at the requesting party and sending location information in the subscriber record to the other party to the call. Depending upon the technology available, the location information may be supplied in-band or on a parallel datapath.

Abstract: A method of making an integrated circuit capacitor and/or resistor and the capacitor and/or resistor wherein the method comprises providing an electrically conductive region, preferably highly doped silicon, forming a first electrode of a capacitor, forming a layer of electrically insulating material, preferably silicon oxide, silicon nitride or a combination thereof, over the surface and forming a layer of a metal silicide, preferably titanium silicide, over the layer of electrically insulating material by forming a layer of polysilicon over the layer of electrically insulating material, forming a layer of a metal, preferably titanium, which forms an electrically conductive composition when reacted with polysilicon over the layer of polysilicon, reacting the metal with the polysilicon to form an electrically conductive layer therewith and removing any unreacted metal.

Abstract: A method of fabricating a semiconductor device comprising the steps of providing an encapsulated semiconductor device bonded to a lead frame, providing a support ring formed of a material which softens when subjected to one of ultrasonic energy or formed of a material which softens when subjected to heat insufficient to cause sufficient expansion of said lead frame relative to said support ring to cause buckling of the leads of said lead frame, preferably thermoplastic and preferably polyphenylene sulfide, disposing leads of said lead frame over said support ring and causing said leads to embed in said support ring by applying ultrasonic energy to said support ring or by applying heat to said support ring insufficient to cause sufficient expansion of said lead frame relative to said support ring to cause buckling of the leads of said lead frame. The lead frame is preferably formed of gold plated copper, solder plate or tin plate.

Abstract: A CMP pad (58) for polishing a semiconductor wafer includes flat polymer sheet (85) for adhering to platen (26). Flat polymer sheet (85) receives slurry (66) that lubricates pad (58) and semiconductor wafer (54) as they contact one another. Pad (58) includes slurry recesses (82) that hold slurry (66) and a plurality of slurry channel paths (66) that form flow connections between predetermined ones of slurry recesses (82). Pad (58) maintains a desired level of slurry (66) between semiconductor wafer (54) and pad (58) to increase the oxide layer removal rate from semiconductor wafer (54), make the semiconductor wafer (54) surface more uniform, and minimize edge exclusion (92) in the CMP of semiconductor wafers (54).

Abstract: A lid alignment assembly for components such as semiconductor device packages, includes a boat 40 for holding at least one semiconductor package 36 and an alignment cover 10 mountable to the boat 40 and having at least one opening 11a therein for positioning a lid 11 over the semiconductor package 36 received in the boat 40. A plurality of tapered tabs 12-19 extend from the cover 10 and contact one or both of the boat 40 and semiconductor package 36 to direct the semiconductor package 36 to a predetermined position beneath the cover 10 and said at least one cover opening 11a.

Abstract: A tool for cleaning the interior of a tube, such as a neck portion of a processing tube of an lpcvd apparatus, or the like, has a pipe that may have at least one hole, and preferably a plurality of holes, spaced from an insulating handle along the length of the pipe in a direction toward a distal end of the pipe to allow cooling atmosphere to be drawn into the pipe. A scraper plate having a shape substantially conforming to an interior shape of the tube and a beveled peripheral edge is attached at the distal end of the pipe. A baffle plate of size smaller than the scraper plate is affixed to the scraper plate by a plurality of standoffs between the scraper plate on an exterior side opposite the interior side and the baffle plate, wherein the baffle plate forms a debris collection region between a peripheral side of the baffle plate and the tube at the exterior side of the scraper plate when the tool is inserted into the tube.

Abstract: A signal driver circuit (10) is provided that comprises a first inverter comprising a P-FET (14), an N-FET (16) and a resistor (18). A second inverter comprises a P-FET (20) and an N-FET (22). Resistor (18) and capacitors (24) and (26) limit the transition times of the output driving signal to control electromagnetic radiation caused by rapid transition times in the output signal. Circuit (10) is independent of the amount of capacitive load (28) driven by the circuit.

Abstract: A system (30) and method for preheating molding compound in the form of resin pellets (20) used in molding integrated circuits (50). A slanted plate (36) is connected to an electrode (31) to preheat resin pellets (20). The slanted plate (36) produces a temperature gradient in pellets (20) with a high temperature end (21) and a lower temperature end (22). A preheated pellet (20) with the lower temperature end (22) first is placed in a mold pot (40). A transfer ram (46) contacts the high temperature end (21) of the pellet (20) to deform the pellet (20) and fill any void spaces between the pellet (20) and surrounding mold pot bushing (44). The ram (46) continues to deform the pellet (20) to force air or other gases from the mold pot bushing (44) and to inject molding compound into a mold cavity (42).

Abstract: A process is disclosed for inhibiting undesired diffusion of implanted dopants during and after dopant activation, as can occur during source/drain anneal. Undesired dopant diffusion is minimized by a dopant blocking layer, which is applied to the semiconductor body prior to dopant activation, and preferably prior to dopant implantation. The composition of the blocking layer is selected in accordance with the diffusion mechanism of the dopant to be implanted so that the concentration of lattice vacancies or interstitials (depending upon the dopant diffusion mechanism) is reduced, thereby inhibiting undesired migration of the implanted species.

Abstract: A process is disclosed for inhibiting lateral diffusion of dopants in a semiconductive material. At least one conductivity dependent region is formed in the semiconductor, and a blocking layer is provided in overlying relation with the conductivity dependent region. Interstitial sites or vacancies are introduced into the conductivity dependent region in accordance with the diffusion mechanism of a selected dopant, and dopant is diffused into the semiconductor in a direction that is substantially transverse to the semiconductor upper surface while inhibiting with the introduced interstitial sites or vacanies lateral diffusion of the dopant into the conductivity dependent region.

Abstract: A method of making an integrated circuit containing a capacitor comprising the steps of providing a semiconductor substrate having an active region and an oxide region on the substrate defining the active region, forming a mask on the active region, forming a region of heavily doped polysilicon on the oxide region having a doping level of from about 10 to about 15 ohms/square, removing the mask from the active region, commencing fabrication of an active device in the active region, forming a layer of electrically insulating material over the region of heavily doped polysilicon and a layer of electrically insulating material over the active region, forming a layer of heavily doped polysilicon having a doping level of from about 10 to about 15 ohms/square on the electrically insulating material to complete fabrication of the capacitor and on the active region and completing fabrication of an active device in the active region.

Abstract: An oscillator is provided for use in integrated circuits of the type that are employed in various, relatively low power, power management systems such as can be found in mobile communications systems and the like. The oscillator provides an output frequency that is highly stable over a range of conventional operational parameters. The oscillator provides a current generator that is comprised of a pair of NMOS transistors and a pair of PMOS transistors that are arranged such that the respective gates of each pair are connected to one another to establish current mirroring. The current generator is connected to a hysteresis circuit, which is operable to develop a potential difference in the circuit. The hysteresis circuit includes an NMOS transistor and a PMOS transistor that are respectively and correspondingly coupled to the current-mirroring NMOS and PMOS transistor pairs of the current generator.

Abstract: An amplifier circuit (10) is provided. Amplifier (10) has an amplifier stage (14) that is coupled to control an output stage (18). Output stage (18) includes a sourcing circuit (20) and a sinking circuit (22). Output stage (18) also includes a mirror circuit (42) that is coupled to an output of amplifier stage (14). Output stage (18) also includes a current balancing circuit (30) coupled to mirroring circuit (42) and sourcing circuit (20). Mirroring circuit (42) draws current from balancing circuit (30) in response to a first predetermined output from amplifier stage (14) such that balancing circuit (30) causes an insignificant current to flow in sourcing circuit (20). Thus amplifier (10) operates to sink current from an external load (12). Alternatively, mirroring circuit (42) may draw an insignificant current from balancing circuit (30) in response to a second predetermined output of the amplifier stage (14). This causes a significant current flow in sourcing circuit (20).

Abstract: A method is provided for forming a thermally enhanced molded cavity package of a type which includes a lid and which is for housing a microcircuit chip. The molded package includes a heat spreader and a lead frame. The method includes the steps of attaching the lead frame to one surface of the heat spreader. A mold press is secured or clamped to-the lead frame and to the opposite surface of the heat spreader. Molding compound is injected into the press to form the package body having an upper and a lower section. During molding, a cavity is provided in the package body having the first surface of the heat spreader as a cavity floor and a lid seat is constructed in the upper section of the package body for maintaining a lid received thereon substantially parallel with respect to the cavity floor. The heat spreader is bonded to at least one of the package body sections and to at least one of the leads of the lead frame.

Abstract: A method for providing programmable devices in which an insulation layer, such as an oxide (20), TEOS, or the like, is formed during a BiCMOS integrated circuit fabrication process includes forming a first conductor fuse layer (22), for example of TiW or the like, on the insulation layer (20). The fuse layer (22) may then be patterned, and a second insulation layer (23) formed over it. Alternatively, the fuse layer (53) may be left unpatterned and one or more conductor layers (35,36) may be formed over the fuse layer (53). The conductor layer (35,36) is patterned, and the fuse layer (53) thereafter patterned using the conductor layer (35,36) as an etch mask. In either case, contact holes (26) are formed in the insulation layer (20) to regions (14,15) to which contact is desired under the insulation layer (20).