Patents Represented by Attorney Pete Thoma
  • Patent number: 5841784
    Abstract: A method and circuits for coupling a memory embedded in an integrated circuit to interconnect pads during a memory test mode is disclosed. The integrated circuit contains a processor, an embedded memory and a switching circuit for: (1) temporary coupling the memory array and memory peripheral circuits, coupled to the processor during normal operation mode of the circuit, to the interconnect pads of the memory during a memory test mode; (2) and decoupling the interconnect pads from the memory array and peripheral circuits, after the memory is tested, and coupling the memory array and peripheral circuits to the processor.
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: November 24, 1998
    Assignee: STMicroelectronics, Inc.
    Inventors: Tsiu Chiu Chan, Lawrence P. Eng