Patents Represented by Attorney Peter Hernandez
  • Patent number: 7197666
    Abstract: A method for checking the reset function of an embedded processor is described. First, a check is made to see if a reset “flag” is not set (202) before branching to execute the test routine that initiates the embedded processor's reset (206). The test program sets the flag (204) before initiating the reset. When the processor resets and executes the test program from the beginning again, it determines that the flag was set (202), and it does not execute the reset instructions again.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: March 27, 2007
    Assignee: Xilinx, Inc.
    Inventor: Robert Yin
  • Patent number: 7030668
    Abstract: A voltage detector circuit such as a power up and/or brownout detector circuit (100) includes a comparator (102) having at least one of its inputs (104) coupled to a diode-connected transistor (108). The other input can include another diode-connected transistor (110) or a resistor divider (302). Optional compensation capacitors (118 and 120) can be added to the comparator output (116) to provide glitch compensation. Since comparator (102) only needs to output a high or low voltage level, the components that are used to build circuit (100) do not have to have very tight tolerances. Circuit (100) also can operate at very low voltages and consume low amounts of power.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: April 18, 2006
    Assignee: Xilinx, Inc.
    Inventor: Eric E. Edwards
  • Patent number: 7010664
    Abstract: A configurable address generator includes addressing sequence circuitry such as a set of counters. A set of comparators is also preferably included in the configurable address generator in order to detect different addressing conditions (e.g., full, empty, etc.). Coupled to these components is a plurality of programmable bits that allows the address generator to be configured to meet a number of different design requirements. For example, the configurable address generator can be configured as a stack pointer; it can also be configured to provide address generation for FIFO and MAC-based filter circuits, etc.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: March 7, 2006
    Assignee: Xilinx, Inc.
    Inventors: Jonathan B. Ballagh, Eric R. Keller, Roger B. Milne
  • Patent number: 6002342
    Abstract: A communication system (700) comprises a plurality of base sites (702-708) which include a first antenna (712) for transmitting a synchronous communication protocol such as a paging protocol and a second antenna (714) for transmitting a rotating phase signal. A communication device (250) takes the synchronous communication protocol and develops a reference signal (220) from the received protocol. The communication device (250) takes the reference signal (220) and the received rotating phase signal (214) and uses a phase detector (216) to produce a phase difference signal (232) which is substantially equal to the angle of the communication device (250) with respect to the particular base site (702-708) which transmitted the signals. In order to determine the location of the communication device at least two such phase difference signals (232), one phase difference signal from at least two different base sites is determined.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: December 14, 1999
    Assignee: Motorola, Inc.
    Inventor: Clifford Dana Leitch