Patents Represented by Attorney Peter Zuwilski

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  • Vertical insulated gate transistor and manufacturing method
    Patent number: 7262460
    Abstract: A vertical insulated gate transistor is manufactured by providing a trench (26) extending through a source layer (8) and a channel layer (6) towards a drain layer (2). A spacer etch is used to form gate portions (20) along the trench side walls, a dielectric material (30) is filled into the trench between the sidewalls gate portions (20), and a gate electrical connection layer (30) is formed at the top of the trench electrically connecting the gate portions (20) across the trench.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: August 28, 2007
    Assignee: NXP B.V.
    Inventors: Jurriaan Schmitz, Raymond J. E. Hueting, Erwin A. Hijzen, Andreas H. Montree, Michael A. A. In't Zandt, Gerrit E. J. Koops