Abstract: A method of achieving pure tone noise control in a charging system of a copier/printer. The method includes the steps of first providing a plurality of individual charging devices and providing a plurality of power supplies for charging the plurality of individual charging devices. Next, charging at least one of the plurality of individual charging devices with a first of the plurality of power supplies at a predetermined frequency and charging at least one of the plurality of individual charging devices with a second of the plurality of power supplies at a frequency different from, but within a band width of, the predetermined frequency; and, lastly, charging at least one of the plurality of individual charging devices with a third of the plurality of power supplies at a frequency different from that of the first and second power supplies and within the band width of the first power supply frequency.

Abstract: A printing subsystem for use in a network printing system, having a database communicating with a client browser, is provided. The database includes a plurality of data sets and the client browser includes a program with a set of instructions for displaying at least one of the plurality of data sets on a user interface display screen. The printing subsystem is disposed remotely of and communicates with both of the database and the client browser. The printing subsystem includes a marking engine and a copy of the program, the program copy receiving the at least one of the plurality of data sets for placing the same in a displayable format. An interface communicates with the program copy for converting the at least one of the plurality of data sets from the displayable format to a printable format, and a print buffer is employed to store the at least one of the plurality of data sets in the printable format in anticipation of producing a print therefrom.

Abstract: Disclosed is a multimedia database for use in distributed network environments. A query processing module transforms user queries into search transformations that can be used for indexing; an attentional selection module records salient information represented in images by a hierarchy of feature maps, saliency maps and combined saliency maps; a declarative memory comprises active modules that update the representations acquired over time for the same images, as well as across images, to cluster, categorize and organize information extracted from different images by the attentional selection module; and an indexing mechanism utilizes the search transformations from the query processing module to search the declarative memory for an answer to a user query.

Abstract: A neural network based improving the performance of an omni-font classifier by using recognized characters for additional training is presented. The invention applies the outputs of the hidden layer nodes of the neural net as the feature vector. Characters that are recognized with high confidence are used to dynamically train a secondary classifier. After the secondary classifier is trained, it is combined with the original main classifier. The invention can re-adjust the partition or boundary of feature space, based on on-line learning, by utilizing the secondary classifier data to form an alternative partition location. The new partition can be referred to when a character conflict exists during character recognition.

Abstract: A system and method is provided for distributed relational databases for parallel sorting of a relation wherein the relation is a set of tuples to be sorted on multiple sort sites which completely decouples the return phase from the sort phase in order to eliminate the merge phase. The method involves selecting one coordinator site from any of the available logical sites, then generating and sorting a local sample on each of the available storage sites before sending the local random sample from each storage site to the designated coordinator site wherein the local random samples are merged to provide a single global sample. The coordinator site determines the global interval key values based on the global sample. The interval key values being determined such that each interval fits in a single sort site's main memory, wherein the tuples between two interval key values define the interval.

Abstract: A matrix transpose method for transposing any size matrix on a 2-dimensional mesh multi-node system with circuit-switched-like routing in the iterative and recursive forms. The matrix transpose method involves a two-level decomposition technique of first partitioning each mesh on a diagonal axis into four submeshes and then further partitioning each of the four submeshes on the diagonal axis into four submeshes. The transposition of all off-diagonal submatrices can be performed concurrently and the transposition of all successive on-diagonal submatrices can be performed iteratively or recursively.

Abstract: A behavioral description translation method is disclosed wherein output and input access functions are identified from behavioral descriptions of the underlying circuit and its components. Structural representations of the behavioral descriptions of the circuits components as identified by the access functions are constructed therefrom from a set of branch primitives provided. From the constructed branches, those S-type branches, i.e., voltage sources and current probes, that are connected in series between the same pair of nodes into one branch where the voltage on the new branch is the sum of the voltages of the old branches are collapsed. Those P-type branches, i.e., the current sources and voltage probes, that are connected in parallel between the same pair of nodes into one branch where the current through the new branch is the sum of the currents of the old branches are collapsed.

Abstract: A method for routing multiple message packets to their respective destinations on a parallel system is disclosed which takes into account the value of the communication start-up time and the transmission time For the specific parallel system. The preferred embodiment involves first selecting a base using the parameters of communication start-up and transmission time and then for each datablock, subtracting the node address from the destination address of the datablock using the modulo-n subtractions to Form a relative offset and representing the relative offset in the pre-selected base before sending the datablocks to their destination nodes in phases, each phase involving scanning the individual i-th digits of the relative offset value and packing those datablocks with identical i-th digits of the relative offset together.

Abstract: A multi-tiered indexing method is disclosed for a partitioned table in a parallel or distributed database system. A Local Index is created and maintained for each partition of the table and a Coarse Global Index is created and maintained. The Coarse Global Index identifies the indexed partition(s) by partition identifiers (PIDs) and associates the individual Index Key Values with their target partitions so that an access request with a highly partition-selective search predicate on the Index Key can be quickly and easily directed to the target partition(s) for processing. An index maintenance locking protocol is also disclosed which handles the insertion and deletion of index entries and assures the consistency between the Local Index entries and the Coarse Global Index entries during concurrent index accesses by different transactions.

Abstract: A method is disclosed, for use with a multiprocessing hardware mesh architecture including nodes and a network of interconnections between the nodes, for defining and implementing a target logical mesh architecture utilizing a given subset of the nodes and the interconnections of the hardware architecture. Typically, the hardware mesh architecture includes redundant nodes and interconnections, sot hat the target logical mesh architecture may be defined from the hardware architecture several different ways. As a consequence, the target logical mesh architecture may be defined even in the presence of faulty nodes or interconnections in the hardware architecture. Frequently, the logical mesh is defined in terms of some regular pattern of interconnections.

Abstract: A modulator apparatus for modulating arrays of input data V.sub.in to be stored in a holographic recording medium is disclosed wherein the final output data array V.sub.out has frequent transitions from light to dark and from dark to light in either dimension across the data page and has the total amount of illuminated regions throughout the entire data page held constant. These two constraints are achieved by a first set of control arrays obtained from two fixed sets of m.times.n binary arrays {A.sub.0, A.sub.1, . . . , A.sub.n } and {B.sub.0, B.sub.1, . . . , B.sub.m } which in turn are obtained from fixed sets of binary control vectors {a.sub.0, a.sub.0, a.sub.1, . . . , a.sub.n }, {b.sub.0, b.sub.1, . . . , b.sub.m }, respectively. The control vectors a.sub.0, a.sub.1, . . . , a.sub.n any n+1 fixed elements of the inverse mapping, .phi. .sup.1 (C.sub.1), of the (t-2) error-correcting code C.sub.1 of length m. The control vectors b.sub.0, b.sub.1, . . . , b.sub.

Abstract: A computer-aided engineering (CAE) tool simulates physical floor-planning of electronic components to be placed and interconnected on both sides of a printed circuit board (PCB). Initially components are placed in a raw portion of the PCB, until an evaluator determines where to re-place selected components in refined portions on both sides of the PCB. The evaluation process is repeated until all components are selected from the raw portion and re-placed in a refined portion. During evaluation, a profile of the raw portion is generated, and the generated profile is searched for a location for placing each selected component.

Abstract: A method for choosing join selectivities in a query optimizer in a relational database management system is disclosed which facilitates the estimation of join result sizes by a query optimizer in a relational database system, wherein a new relation R is to be joined with an intermediate relation I, and wherein the selectivity values for each eligible join predicate are known. The method has the steps of determining the equivalence classes for a plurality of join attributes and then computing for each relation an estimate of the cardinality and the number of distinct values in each attribute after all the local predicates have been included. These are used in further computation of join selectivities and join result sizes. The join predicates must then be processed by correctly choosing the join selectivities. The join result sizes can then be correctly calculated.

Abstract: A method is disclosed for recovery from synchronization errors caused by deletions and/or insertions of symbols in the presence of errors that alter the symbols in any code constrained binary record. The method initially divides the sequence of data into equal size blocks before appending a binary sync sequence at the end of each block not encountered in the block. Then, the blocks are resynchronized by first determining the size of any symbol insertions and/or deletions that have occurred. Then, scanning for the sync sequence starting at the presumed end of the data field of the current block so as to determine the offset of the sync sequence with respect to that specific location. After this location of the insertions and/or deletions has been determined, a corresponding number of symbols can be added or deleted from the middle of the block according to the offset determined by the present method.

Abstract: A method is disclosed whereby systems having bidirectional and/or multiplicatively driven data paths are statically scheduled for simulation. The method flattens the netlist to convert bidirectional data flow paths into unidirectional, multiplicatively driven data paths. All drivers connected to multiplicatively driven data paths (or nets) are isolated from the net using a bus resolution block. The bus resolution block implements a resolution function which permits the system to be statically scheduled for simulation. Simulation speed is increased substantially thereby.

Abstract: An encoding apparatus for constructing an asymptotically optimal coding scheme for second order DC-constrained channels is disclosed. A first encoding function block breaks an input data stream into equal sized vectors of length m bits. A sign designation bit is then attached to each vector to make vectors of length m+1 bits. r redundancy bits are added to each vector, to produce balanced vectors of length m+1+r bits. A first moment is calculated for each vector. A determination is made whether the addition of this vector's first moment value to an accumulated running sum of all the vectors' first moments effectively drives the running sum in the direction of zero. If is does then that vector's first moment is added to the accumulated running sum of first moments and the vector is added to the output array.

Abstract: A method is for routing packets in parallel computers with torus interconnection networks of arbitrary size and dimension having a plurality of nodes, each of which contains at least 2 buffers per edge incident to the node. For each packet which is being routed or which is being injected into the communication network, a waiting set is specified which consists of those buffers to which the packet can be transferred. The packet can be transferred to any buffer in its waiting set which has enough storage available to hold the packet. This waiting set is specified by first defining a set of nodes to which the packet is allowed to move and then defining a candidate set of buffers within the defined set of nodes. Then, defining an ordering of the nodes across the network from smallest to largest. The buffers in each node are then classified into four classes.

Abstract: A method and apparatus are presented for tolerating up to k faults in d-dimensional mesh architectures based on the approach of adding spare components (nodes) and extra links (edges) to a given target mesh where exactly k spare nodes are added and the number of links per node (degree of the mesh) is kept to a minimum. The resulting architecture can be reconfigured, without the use of switches, as an operable target mesh in the presence of up to k faults. According to one aspect of the invention, given a d-dimensional mesh architecture M having N=n.sub.1 .times.n.sub.2 x . . . x n.sub.d nodes, the fault tolerant mesh can be represented by a circulant graph having exactly N+k nodes. This graph has the property that given any set of k or fewer faulty nodes, the remaining graph, after the performance of a predetermined node renaming process, is guaranteed to contain as a subgraph the graph corresponding to target mesh M so long as d.gtoreq.2 and n.sub.d .gtoreq.3.