Abstract: In a computing system having a data source, a memory, and a central processing unit (CPU), data is transferred from the data source to the memory by first monitoring signals from the CPU to determine whether data transfer is desired. If data transfer is desired, an optimized instruction set is generated which is specifically designed to cause the CPU to carry out the data transfer in an optimal manner. This optimized instruction set is sent to the CPU and is executed thereby to transfer the data quickly and efficiently. An apparatus for carrying out the above method comprises a determiner, an instruction generator, and a coupling circuit. The determiner monitors address and control signals from the CPU to determine whether data transfer is desired. In response to a determination that data transfer is desired, the determiner generates a run control signal.