Abstract: In an embodiment, a circuit device includes a first counter responsive to a clock signal and to a first control word having a first precision. The counter produces a first control signal related to the first control word at a first output. The circuit device further includes a second counter responsive to the clock signal and to a second control word having the first precision. The second counter produces a second control signal related to the second control word at a second output. The circuit device also includes a filtering circuit responsive to the first output and the second output to receive the first and second control words. The filtering circuit is adapted to produce an output control signal related to the first and second control words, where the output control signal has a second precision that is greater than the first precision.

Abstract: An RF transmitter (104) includes a shared local oscillator circuit (126), transmit path circuitry (120, 122, 124), a divider (134), and a lowpass filter (322). The shared local oscillator circuit (126) generates a shared LO signal (116). The transmit path circuitry (120, 122, 124) mixes a baseband signal (107) and an IF mixing signal (116) to provide an IF signal (112), and converts the IF signal (112) to an RF transmit signal (105) at a desired frequency using an RF mixing signal received at a mixing input thereof. The divider (134) divides the shared LO signal (116) to provide an unfiltered RF mixing signal. The lowpass filter (322) has an input for receiving the unfiltered RF mixing signal, and an output coupled to the mixing input of the transmit path circuitry (120, 122, 124) for providing the RF mixing signal.

Abstract: In a particular embodiment, a circuit device includes a pulse edge control circuit to receive at least one pulse-width modulated (PWM) signal from a PWM source. The pulse edge control circuit is adapted to selectively apply a phase shift operation to the at least one PWM signal at integer submultiples of a frame repetition rate to produce at least one modulated PWM signal having a changed power spectrum. The pulse edge control circuit provides the at least one modulated PWM signal to at least one output of the pulse edge control circuit.

Abstract: In a particular embodiment, a circuit device is disclosed that includes a power sourcing equipment (PSE) circuit having a plurality of high-voltage line circuits adapted to communicate with a respective plurality of powered devices via network cables. The PSE circuit includes a serial interface circuit and includes a common controller coupled to the serial interface circuit and to the plurality of high-voltage line circuits. The circuit device also includes a low-voltage circuit having a programmable controller adapted to transmit control signals to the common controller via the serial interface circuit to control operation of the plurality of high-voltage line circuits.

Abstract: A receiver (100) includes a mixing digital-to-analog converter (DAC) (120), a direct digital frequency synthesizer (DDFS) (116), and a clock circuit (114). The mixing DAC (120) includes a radio frequency (RF) transconductance section (124) and a switching section (128). The RF transconductance section (124) includes an input configured to receive an RF signal. The switching section is coupled to the RF transconductance section (124) and includes inputs, configured to receive bits associated with a digital local oscillator (LO) signal, and an output. The DDFS (116) includes outputs, configured to provide the bits associated with the digital LO signal to the inputs of the switching section (128), and a first clock input, configured to receive a first clock signal that sets a sample rate for the digital LO signal The clock circuit (114) is configured to provide the first clock signal to the first clock input of the DDFS (116) at a frequency that is based on a selected channel.

Abstract: According to a disclosed method, a calibration signal is provided at a first frequency corresponding to a low frequency edge of a desired passband to an input of a filter (240). A first value is measured at an output of the filter (240). The calibration signal is provided at a second frequency corresponding to a high frequency edge of the desired passband to the input of the filter (240). A second value is measured at the output of the filter (240). The first value is compared to the second value. A characteristic of the filter (240) is changed in response to the comparing. In one form, the filter is an IF filter (240) and a receiver (200) includes both the IF filter (240) and a calibration circuit (250) for forming the calibration signal and providing the calibration signal to the IF filter to change the characteristic in response to a calibration operation.