Patents Represented by Attorney Price, Reneveld, Cooper, DeWitt & Litton, LLP
  • Patent number: 7873203
    Abstract: The present invention involves a computationally efficient method of determining the locations of standard cells in an image of an IC layout. The initial step extracts and characterizes points of interest of the image. A coarse localization of possible standard cell locations is performed and is based on a comparison of the points of interest of an instance of an extracted standard cell and the remaining points of interest in the image. A more rigid comparison is made on the list of possible locations comprising a coarse match and a fine match. The coarse match results in a shortlist of possible locations. The fine match performs comparisons between the template and the shortlist. Further filtering is done to remove the effects of noise and texture variations and statistics on the results are generated to achieve the locations of the standard cells on the IC layout.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: January 18, 2011
    Assignee: Semiconductor Insights Inc.
    Inventors: Vyacheslav L. Zavadsky, Val Gont, Edward Keyes, Jason Abt, Stephen Begg