Patents Represented by Attorney, Agent or Law Firm R. Edward Brake
  • Patent number: 6818274
    Abstract: An infill layer for use in an artificial turf system is provided. The artificial turf system may include a pile fabric having a turf backing and a plurality of turf fibers extending upwardly from the turf backing. The infill layer may include particulate material disposed upon an upper surface of the turf backing and between the turf fibers. The infill layer may advantageously comprise ceramic support material in one or more courses. The ceramic support material may also be combined with other hard particles and/or with resilient particles in the infill layer. Alternatively, recycled support material or support material having a substantially consistent size and shape may be used instead of ceramic support material.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: November 16, 2004
    Assignee: Bright Intellectual Asset Management, LLC
    Inventors: Mark E. Buck, Ronald C. Linn
  • Patent number: 6170025
    Abstract: A distributed computer system includes a host CPU, a network/host bridge, a network/I/O bridge and one or more I/O devices. The host CPU can generate a locked host transaction, which is wrapped in a packet and transmitted over a network to the remote I/O device for replay. The remote I/O devices can generate interrupts. The interrupt is wrapped in a packet and transmitted to the host computer for replay as an interrupt. The host CPU then executes the appropriate interrupt service routine to process the interrupt routine. The remote location of the I/O device with respect to the host CPU is transparent to the CPU and I/O devices. The bridges perform wrapping and unwrapping of host and I/O transactions for transmission across a network.
    Type: Grant
    Filed: August 11, 1998
    Date of Patent: January 2, 2001
    Assignee: Intel Corporation
    Inventors: Ken Drottar, David S. Dunning, William T. Futral
  • Patent number: 6148356
    Abstract: A computer system includes a host processor coupled to a host bus. A bridge controller is coupled to the host bus and to a plurality of first buses. The computer system also includes one or more bus bridges, each coupled to the bridge controller via one or more of said first buses. Each bus bridge is connected to one or more second buses. Either the first buses or the second buses are each configurable in either an independent mode in which the bus operates independently, or a combined mode in which two or more of said first buses or said second buses are combined to create a single bus.
    Type: Grant
    Filed: January 26, 1998
    Date of Patent: November 14, 2000
    Assignee: Intel Corporation
    Inventors: David W. Archer, D. Michael Bell, Doug Moran, Steve Pawlowski