Abstract: A transistor memory cell is disclosed of the type wherein an unclamped conducting transistor in each of a plurality of memory cells connected to a given word line is driven into saturation when storing data. The cell is equipped with controlled active devices for discharging the saturation capacitance of the conducting transistors prior to writing new data into the cells. Each active device is characterized with a forward low-impedance current direction and reverse high impedance current direction therethrough for each saturation transistor. Each active device is connected to discharge an associated saturation transistor in its forward current direction. In one embodiment, each active device discharges to a word line when the line is brought to an appropriate control potential. In another embodiment, each active device discharges to a separate discharge line not connected to the work line when the former line is brought to an appropriate control potential. The active devices may be diodes.