Patents Represented by Attorney R. T. Watland
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Patent number: 4972465Abstract: A switching system is disclosed in which inter-switch unit trunks interconnect the switch units of a distributed switching system and when the central switch, which normally advances connections between the switch units is unavailable, connections between switch units are advanced by control units of the switch units over the inter-switch unit trunks. The inter-switch unit trunks comprise a connection arrangement which is an alternative to the central switch. In one embodiment, the control unit of a first switch unit detects the unavailability of the central switch to advance connections and in response to a request for connection to destination line or trunk at a second switch unit transmits signaling information on a selected inter-switch unit trunk to the second switch unit. The second switch unit responds to the signaling information by completing a connection from the selected inter-switch unit trunk to the destination.Type: GrantFiled: May 24, 1989Date of Patent: November 20, 1990Assignee: AT&T Bell LaboratoriesInventors: William K. Cline, Michele M. Janowiak, Ram Nathan
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Patent number: 4887079Abstract: A switching network where a large class of combinatorial designs which are well known in the mathematical literature are for the first time applied to advantageously define the pattern of permanent connections effected between network input channels and initial network crosspoints, illustratively by a connection arrangement of a two-stage, rearrangeable network. The class of combinatorial designs comprises designs of three types: (1) block designs, (2) orthogonal arrays, and (3) difference sets. Each of these is used in a unique manner to derive an advantageous pattern of permanent connections.Type: GrantFiled: December 23, 1986Date of Patent: December 12, 1989Assignee: AT&T Bell LaboratoriesInventors: Frank K. Hwang, Gaylord W. Richards
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Patent number: 4500985Abstract: A number of communication units are connected to a time-multiplexed switch via communication links. Control messages are conveyed among the communication units and a central control whereby paths are established through the time-multiplexed switch from originating communication units to terminating communication units. One of the control messages conveyed to a terminating communication unit during call setup includes a link identifier defining the communication link between the originating communication unit and the time-multiplexed switch. In accordance with the present invention, when the originating communication unit begins transmitting data words, one bit position of each data word is used to transmit consecutive bits of the link identifier so that the link identifier is transmitted repetitively every fixed number of frames.Type: GrantFiled: December 8, 1982Date of Patent: February 19, 1985Assignee: AT&T Bell LaboratoriesInventor: Shih-Jeh Chang
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Patent number: 4499532Abstract: A floating battery feed circuit comprising a switching-mode, flyback power converter wherein a capacitor connected to a converter transformer winding develops a relatively low voltage used to energize the converter control circuitry. The converter control circuitry prevents the operation of the battery feed circuit unless the voltage developed by the capacitor is above a predetermined magnitude. The power converter advantageously operates in only a constant-power mode regardless of loop impedance.Type: GrantFiled: March 23, 1983Date of Patent: February 12, 1985Assignee: AT&T Bell LaboratoriesInventors: Robert C. Hudson, William F. MacPherson, Charles H. Sharpless
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Patent number: 4485468Abstract: A control word generation method and a structural arrangement of a control word source for use in a time division switching system for serving multirate data stations. The control word source includes a first memory that stores a first plurality of path-definition words defining communication paths for nonsubrate channels and a plurality of storage reference words. The control word source also includes a second memory that stores a second plurality of path-definition words defining communication paths for subrate channels. The first memory is read sequentially and control words are derived from each of the read path-definition words. A location generator responds to timing pulses generated by a network clock and to each of the plurality of read storage reference words by generating a location signal defining a storage location of the second memory. The second memory is read in response to this location signal and a control word is derived from the path-definition word thus read.Type: GrantFiled: April 1, 1982Date of Patent: November 27, 1984Assignee: AT&T Bell LaboratoriesInventor: Matthew F. Slana
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Patent number: 4484324Abstract: A control information communication arrangement for a time division switching system having distributed control processors. An originating processor transmits circuit setup request control words including an address defining a destination processor, to a control word switch via control time slots through a time-multiplexed switch. The control word switch responds by establishing a communication path to the destination processor via the time-multiplexed switch and then transmitting a status signal to the orginating processor indicating that the path has been established. In response to the status signal, the originating processor begins transmitting the control message control words which comprise a control message. Advantageously, the control word switch does not store entire control messages before conveying them to destination processors.Type: GrantFiled: August 23, 1982Date of Patent: November 20, 1984Assignee: AT&T Bell LaboratoriesInventor: Milo Orsic
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Patent number: 4467149Abstract: An arrangement to compensate for the leakage and biasing characteristics associated with the semiconductor crosspoints of a concentrator to allow accurate telephone subscriber loop measurements to be made through the concentrator. A compensation current is supplied which varies linearly with the applied test voltage according to a relationship that is determined adaptively just prior to the test so that the effects of device differences and temperature variations are minimized. The approach is extended to nonlinear compensation.Type: GrantFiled: February 10, 1983Date of Patent: August 21, 1984Assignee: AT&T Bell LaboratoriesInventor: Laurence L. Sheets
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Patent number: 4460806Abstract: A dual tone multifrequency and dial pulse receiver that receives 8000 digital data words per second, each of the data words including eight PCM bits representing the analog signal transmitted from a subscriber set and also including a line status bit indicating the DC status of the line. The receiver includes a time-shared processor which processes the PCM bits of 4000 words per second to detect tone-pairs and which also processes the line status bit of 4000 words per second to detect valid dial pulse sequences. The time-shared processor stores one of a first plurality of code words in a register when a tone-pair is detected and stores one of a second plurality of code words in the register when a valid dial pulse sequence is detected. Advantageously, the receiver can detect either dual tone multifrequency or dial pulse signaling from a subscriber even though the type of signaling to be used by the subscriber is not known a priori.Type: GrantFiled: May 13, 1982Date of Patent: July 17, 1984Assignee: AT&T Bell LaboratoriesInventors: Ronald J. Canniff, Gordon K. Lin
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Patent number: 4458968Abstract: An arrangement for the solderless mounting of a leadless integrated circuit chip carrier (13) on a printed wiring board (10). A contact interface element (20) presents an array of electrically conductive annular springs (27) which electrically connect the contact pads (14) of the chip carrier (13) and the contact pads (15) of the printed wiring board (10) is interposed between the carrier (13) and the board (10). The interface element (20) is fitted about a locating block (32) affixed to the board (10), the block (32) having a central aperture (33) dimensioned to freely admit a central pin (36) extending from the underside of the chip carrier (13). The latter component is held in place by a retaining ring (39) frictionally fitted to the pin (36) and operating against a collar (37) through which the pin (36) also passes, which collar (37) is press-fitted into the locating block (32).Type: GrantFiled: July 6, 1982Date of Patent: July 10, 1984Assignee: AT&T Bell LaboratoriesInventor: James J. Madden
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Patent number: 4429185Abstract: A voltage detector circuit for detecting a DC voltage on a line in the presence of a substantially fixed frequency AC voltage. The circuit may be used to detect call originations on a telephone line having longitudinal AC voltages induced thereon. The circuit compares the instantaneous voltage on the line with a reference level and repetitively increments a counter when the instantaneous voltage exceeds the reference level and repetitively decrements the counter when the instantaneous voltage does not exceed the reference level. After operating the counter for a time interval substantially equal to the period of the fixed frequency AC voltage, the most significant bit of the counter will indicate whether the DC voltage on the line is above the reference level. The circuit may also be used to detect call terminations on the line.Type: GrantFiled: December 21, 1981Date of Patent: January 31, 1984Assignee: Bell Telephone Laboratories, IncorporatedInventors: James M. Adrian, Victor H. Mitnick
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Patent number: 4429391Abstract: A fault and error detection arrangement for detecting transmission and routing errors made by systems in which a central data transmitter/receiver (601, 610) bidirectionally intercommunicates with peripheral circuits (620) through an interconnection arrangement (604). The parity bits of certain data words transmitted by the central data transmitter (601) are intentionally inverted by a central parity inverter (602), in a known sequence. Data words transmitted by the central data transmitter (601) are routed by the interconnection arrangement (604) to the peripheral circuits (620) where parity is checked by a peripheral parity checker (621) and a parity invert signal is generated when an inverted parity data word is found. A peripheral parity inverter (623) included in each peripheral circuit (620) responds to the parity invert signals by inverting the parity bit of the next data word transmitted by a peripheral data transmitter (622) also included in each peripheral circuit (620).Type: GrantFiled: May 4, 1981Date of Patent: January 31, 1984Assignee: Bell Telephone Laboratories, IncorporatedInventor: Robert C. Lee
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Patent number: 4415220Abstract: An electrical terminal pin (10) adapted for engagement with a plated-through hole in a printed wiring board backplane. The pin includes at least one end (12) for receiving electrically conductive elements and an S-shaped compliant portion (16) adapted and dimensioned to minimize deformation of the plated-through hole. The compliant portion (16) includes a transition section (17) in which the S-shaped cross section evolves from the square cross section of the end (12) of the pin (10). Because of the varying dimensions in the transition section (17), a smaller plated-through hole, which requires more "conditioning" than a larger hole, will be first encountered by a relatively stiffer part of the pin (10). As a result, the tolerance required in the production of plated-through holes may be increased.Type: GrantFiled: May 29, 1981Date of Patent: November 15, 1983Assignee: Bell Telephone Laboratories, IncorporatedInventor: Rishi Kant
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Patent number: 4401861Abstract: An arrangement for performing subscriber loop testing through a concentrator/expandor employing semiconductor crosspoints. The crosspoints of the concentrator/expandor are relatively nonlinear when conducting currents less than a predetermined current and are relatively linear when conducting currents in excess of the predetermined current. When tests are to be applied to a given subscriber loop which comprises a tip conductor and a ring conductor, two paths are completed through the concentrator/expandor to the tip conductor and two paths are completed through the concentrator/expandor to the ring conductor. A linearizing source then transmits a current in excess of the predetermined current around the circuits formed by the two concentrator/expandor paths to each subscriber loop conductor. Test signals are then applied to the subscriber loop by connecting such signals between the two paths to the subscriber ring conductor and the two paths to the subscriber tip conductor.Type: GrantFiled: August 10, 1981Date of Patent: August 30, 1983Assignee: Bell Telephone Laboratories, IncorporatedInventors: Arthur R. Braun, Robert E. Poignant
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Patent number: 4402039Abstract: A floating, constant power, battery feed circuit wherein a single transformer is used to perform the functions of battery feed and audio coupling. AC feedback is used to control the dynamic output impedance of the circuit. To achieve a constant dynamic output impedance, the amount of AC feedback is controlled by the DC output voltage, which in turn depends on the loop resistance. To achieve a constant audio gain from the switching network to the subscriber set, the audio signal from the switching network is multiplied by a signal representing the DC output voltage.Type: GrantFiled: September 3, 1981Date of Patent: August 30, 1983Assignee: Bell Telephone Laboratories, IncorporatedInventor: Howard F. Jirka
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Patent number: 4400627Abstract: An arrangement and method for interconnecting the stages of a space division switching network which provides simple and continuous growth from a small number of lines to the system's maximum number of lines. The switching network comprises up to M input stage switches, center stage switches and up to M output stage switches. Incoming lines are connected to the input terminals of the input stage switches such that no input stage switch is connected to a number of incoming lines which exceeds the number of incoming lines connected to any other input stage switch by more than one. The number of center stage switches is established from a predetermined interconnection plan and at any given time, the number of center stage switches is a function of the number of lines connected to the input stage switch having the largest number of lines connected thereto. As each line is connected to an input stage switch, the output terminals of that switch are distributed over the available center stage switches.Type: GrantFiled: May 4, 1981Date of Patent: August 23, 1983Assignee: Bell Telephone Laboratories, IncorporatedInventor: Meyer J. Zola
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Patent number: 4382294Abstract: A time division switching system which includes a central control, two time-multiplexed switching units each having a control distribution unit associated therewith and a plurality of interface modules each including a selected active control unit. Data words representing subscriber-generated information are conveyed between interface modules by a selected one of the time-multiplexed switching units designated as active. The active time-multiplexed switching unit also conveys control messages between each of the interface modules and the control distribution unit associated with the active time-multiplexed switching unit. However, the time-multiplexed switching unit designated as standby is also used to convey control messages between each of the interface modules and its associated control distribution unit. Each of the control distribution units routes received control messages to the interface modules via its associated time-multiplexed switching unit or to the central control.Type: GrantFiled: October 26, 1981Date of Patent: May 3, 1983Assignee: Bell Telephone Laboratories, IncorporatedInventors: Hugo J. Beuscher, Maurice N. Ransom