Abstract: Apparatus and method to carry out checks for memory errors within a memory device independently of a memory controller during times when there is no activity on a memory bus coupling the memory device to the memory controller that involves the memory device.

Abstract: A buffer logic within a memory module having the capability to carry out a test of another memory module to which it is coupled via a point-to-point bus through autonomously storing and transmitting a test pattern across that point-to-point bus to the other memory module, while further employing another buffer logic that is interposed between the two memory modules to pass on the test pattern, but intercept a signal received from the other memory module during the test and pass on an indication of the receipt of that signal to an analysis device to monitor the test.

Abstract: A secure method for updating computer firmware online is described. The firmware storage locations are write protected prior to loading the operating system. Updating the firmware after loading the operating system helps to reduce downtime.

Abstract: In some embodiments, an adaptive filter employs two adaptation modes, where during one adaptation mode the adaptive filter is updated only when the received training sample is a first binary value and during the other adaptation mode the adaptive filter is updated only when the received sample is a second binary value. Each adaptation mode provides a set of filter weights, and these two sets of filter weights are averaged to provide an adapted set of filter weights. The use of two adaptation mode allows for a clock boundary in which the digital portion of the filter operates at a lower clock rate than the analog portion. In other embodiments, a filter architecture is described for providing the algebraic signs of the received data samples, important for sign-sign least means square filtering algorithms. In other embodiments, a filter architecture is described in which efficient use is made of voltage-to-current converters so as to achieve a high throughput rate during filtering.

Abstract: A technique in accordance with the invention includes in response to an asynchronous interrupt occurring during a run time of an operating system, executing instructions. These instructions are associated with firmware that is used to initialize a computer system before launching of the operating system.

Abstract: Methods and apparatuses of configuring a computer system. During a runtime stage or a preboot stage, a device driver for a configurable device exports a set of the configuration information that is resident the buffer during the preboot stage of the computer system. The configuration information is retrieved. The configuration information for said configurable device includes information enabling a callback operation, which allows an operator to dynamically interact with said configurable device. A homepage including a configuration menu for said configurable device is generated and presented to the operator to make configuration selections. The homepage is generated based on the information contained in the buffer. The configuration selections are communicated to the device driver. The configuration selections for said configurable device in a nonvolatile storage module included within said computer system.

Abstract: A method for entity name and jargon term recognition and extraction. An embodiment of the present invention uses a suffix tree data structure to determine frequently occurring phrases. In one embodiment text to be analyzed is preprocessed. The text is then separated into clauses and a suffix tree is created for the text. The suffix tree is used to determine repetitious segments. Unrecognized text fragment, occurring with a high frequency, have a comparably high probability of being a name entity or jargon term. The set of repetitious segments is then filtered to obtain a set of possible entity names and jargon terms.

Abstract: A method and apparatus for using different timings to latch signals sent by two memory devices of identical design to compensate for differences in the lengths of conductors across which the signals must propagate.