Patents Represented by Attorney Rader, Fishman & Grauer LLP
  • Patent number: 7683691
    Abstract: Disclosed herein is a clock supplying apparatus for supplying a clock to a digital circuit, including: a differential clock driver; a first clock line along which a first clock of a positive phase from the clock driver propagates; a second clock line along which a second clock of a reverse phase from the clock driver propagates; and a parallel resonance circuit of an inductor and a capacitor. The inductor of the parallel resonance circuit is connected at a first end to the first clock line and at a second end to the second clock line. The capacitor of the parallel resonance circuit is connected at a first electrode to the first clock line and at a second electrode to the second clock line.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: March 23, 2010
    Assignee: Sony Corporation
    Inventor: Ichiro Kumata
  • Patent number: 6993123
    Abstract: In operational environments where local loop generation equipment is used, communication interruptions between a central office and a customer premises device is minimized by using a dedicated communications link between the local loop generation equipment and the central office. A processing mechanism at the central office determines if, when, and under what circumstances the customer premises device will be notified in response to the activation of local loop generation equipment. This eliminates the need to place local loop generation equipment in series with a communications path that runs between the central office and the customer premises. The central office may provide the dedicated communications link in the form of a telephone line which is equipped to place outgoing local calls, but not equipped to receive incoming calls, and not equipped to place long-distance calls.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: January 31, 2006
    Assignee: Verizon Services Corp.
    Inventors: Joseph Allen, Douglas R. Jones, Daniel J. O'Callaghan
  • Patent number: 6742925
    Abstract: The verification of accuracy of an IR thermometer is provided at any temperature in the range of −25° C. to +100° C., preferably at the room temperature. The magnetic surface of a thermo-conductive mat of the present invention is applied to any metallic surface in a room. The user waits to give the contact thermometer arranged on the mat time to reach thermal equilibrium, and then aims the beam of the IR thermometer at the black body target on the mat. The reading of the IR thermometer is then compared with the reading of a contact thermometer, which is attached to the mat adjacent to the black body target. The lightweight, portable, low-cost temperature verification mats of the present invention can be used for verification of IR thermometers in different customer environments, such as in industrial environments, and with retail equipment, or home appliances, including ovens and freezers, etc.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: June 1, 2004
    Assignee: Cole-Parmer Instrument Company
    Inventor: Wilhelm Maccarone
  • Patent number: 6424328
    Abstract: When time-division driving, which allows the number of output pins of a driver IC to be reduced, is applied to an active-matrix LCD apparatus, a time-division number is set to an odd number, preferably to the n-th (n: natural number) power of three, and a time-sequential signal (dot inversion signal) output from the driver IC is time-divided by a time-division switch and sent to signal lines 12-1, 12-2, 12-3, . . . to implement complete dot inversion driving.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: July 23, 2002
    Assignee: Sony Corporation
    Inventors: Masumitsu Ino, Toshikazu Maekawa, Yoshiharu Nakajima, Hiroaki Ichikawa
  • Patent number: 6408012
    Abstract: A signal processing circuit which can effectively use a serial interface bus, provided with transmission processing circuits and a link core for dividing or synthesizing an input transport stream packet based on a number of divided blocks or a number of synthesized packets set in advance in accordance with the input rate, adding a time stamp which suppresses jitter at the serial interface bus and determines the output time of the data at the reception side, and sends the same to the serial interface bus.
    Type: Grant
    Filed: August 12, 1998
    Date of Patent: June 18, 2002
    Assignee: Sony Corporation
    Inventor: Sadaharu Sato
  • Patent number: D552081
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: October 2, 2007
    Assignee: Sony Corporation
    Inventor: Ken Yano
  • Patent number: D615660
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: May 11, 2010
    Assignee: Somanetics Corporation
    Inventors: Arik Anderson, Ronald A. Widman, Oleg Gonopolskiy