Abstract: Apparatus for retaining a semiconductor wafer in a semiconductor wafer processing system. The apparatus comprises a support pedestal for supporting the wafer, first and second coplanar electrodes in the support pedestal for creating a chucking force, a cathode electrode for establishing wafer processing conditions and a third gap fill electrode positioned vertically between the first and second electrodes, such that the gap fill electrode is radially coincident with the gap between the first and second electrodes. A method of making the wafer retaining apparatus may comprise the steps of depositing electrode layers over molten, drawn sapphire layers to form a unitary bipolar electrostatic chuck having a gap fill electrode spaced between a pair of bipolar chucking electrodes and an RF powered electrode and radially coincident with the gap between the bipolar chucking electrodes.

Abstract: A high efficiency radio frequency (RF) impedance matching network containing an "L-type" inductor-capacitor (LC) circuit where the capacitor is a variable capacitor coupled from an input port to ground and the inductor is a variable inductance inductor coupled from the input port to an output port. A blocking capacitor is provided between the inductor and the output port and a ceramic capacitor is coupled in parallel across the variable capacitor. The impedance match is tuned by physically adjusting tuning elements of both the inductor and capacitor. The variable inductor contains an improved inductor tuning element that optimizes current flow in the tuning elements and inductor. To further improve the efficiency of the matching network, the assembly uses an improved enclosure interior finish and various circuit optimization techniques that reduce contributions to match loop resistance.

Abstract: Apparatus and a concomitant method for estimating voltage on a wafer located in a process chamber. A probe, attached externally to a wall of the process chamber, detects voltage levels generated by a plasma within said process chamber. A relationship between the detected plasma voltage level and the wafer voltage is determined.

Abstract: A method and apparatus that provides process monitoring within a semiconductor wafer processing system using multiple process parameters. Specifically, the apparatus analyzes multiple process parameters and statistically correlates these parameters to detect a change in process characteristics such that the endpoint of an etch process may be accurately detected, as well as detecting other characteristics within the chamber. The multiple parameters may include optical emissia, environmental parameters such as pressure and temperature within the reaction chamber, RF power parameters such as reflected power or tuning voltage, and system parameters such as particular system configurations and control voltages.

Abstract: Apparatus for measuring wafer support pedestal temperature in a semiconductor wafer processing system. The apparatus measures infrared energy emitted by the bottom of the pedestal via a tube having one end inserted in a bore through the underside of the cathode pedestal base. The distal end of the tube is coupled to a temperature sensor. Both the tube and temperature sensor are fitted with insulating sleeve adapters to suppress unwanted RF signals from coupling to the sensor.