Abstract: A compact broadband antenna. The antenna includes a first mechanism for receiving input electromagnetic energy. A second mechanism provides radiated electromagnetic energy upon receipt of the input electromagnetic energy. The radiated electromagnetic energy is provided via an antenna element having one or more angled surfaces. A third mechanism directs the radiated electromagnetic energy in a specific direction. In a more specific embodiment, the third mechanism includes a reflective backstop that is selectively positioned behind the second mechanism to reflect back-radiated energy forward of the second mechanism, thereby causing reflected electromagnetic energy to combine in phase with forward-radiated energy from the second mechanism. The third mechanism further includes plural layers of dielectric material.

Abstract: A leadscrew mechanical drive includes a leadscrew having a leadscrew axis and a leadscrew thread with a nonzero leadscrew thread pitch, and a leadscrew follower structure engaged to the leadscrew. The leadscrew follower structure includes a threaded insert having an insert thread with a nonzero insert thread pitch different from the leadscrew thread pitch, which is threadably engaged to the leadscrew. The leadscrew follower structure further includes a bearing in which the threaded insert is received and which permits the threaded insert to rotate about the insert axis, a bearing support in which the bearing is received, and a preload structure which biases the insert thread against the leadscrew thread.

Abstract: A leadscrew assembly includes a leadscrew having a leadscrew thread wire helically wound about a leadscrew axis in a plurality of cylindrical leadscrew-thread turns and having a leadscrew-thread pitch. A leadscrew wire nut assembly includes a nut-assembly wire helically wound about the leadscrew axis in a plurality of cylindrical nut-assembly turns and having a nut-assembly-thread pitch. The nut-assembly-thread pitch is substantially the same as the leadscrew-thread pitch, the nut-assembly turns overlie and mesh with the leadscrew-thread turns, and the nut-assembly wire has a permanent deformation therein. A wire-nut-assembly housing overlies and is bonded to at least some of the nut-assembly turns.

Abstract: An optical measurement apparatus operable with a test specimen has a light source with a laser having an output beam, and a beam splitter that splits the output beam of the laser into a first split beam and a second split beam. A test specimen holder holds the test specimen therein. A first optical fiber receives the first split beam and directs the first split beam against the test specimen in the test specimen holder. The apparatus further includes an instrumentation module. A second optical fiber receives the second split beam and conducts the second split beam to the instrumentation module. A third optical fiber receives signal light from the test specimen in the test specimen holder and conducts the signal light to the instrumentation module.

Abstract: A composite dieletric film for final passivation of an integrated circuit. First, plasma-enhanced TEOS oxide is deposited to a thickness of 2000 .ANG., followed by thermal O.sub.3 -TEOS oxide to a thickness of 8000 .ANG., and then silicon nitride to a thickness of 10,000 .ANG..

Abstract: photosensor device (41) having tapered photodiodes (53, 55) that are interdigitated and which is compatible with typical ASIC, CMOS and BiCMOS processes. A left side photodiode array of tapered regions (53) of a first conductivity type is disposed into an epitaxial layer of a second conductivity type. This array of photodiodes is coupled together and further coupled to a first output terminal (43). A fight side photodiode array of tapered regions (55) of said first conductivity type is disposed into the epitaxial layer of the second conductivity type, spaced apart from the left side photodiode by a minimum distance. A second output terminal is coupled to the array of fight side photodiodes (51). An incident light spot (39) is focused onto the sensor. The amount of current generated at the first and second output terminals (43, 51) will be proportional to the area of the left photodiode array and the area of the fight photodiode array which is receiving light.

Abstract: A photosensor device (41) having tapered photodiodes (53, 55) that are interdigitated and which is compatible with typical ASIC, CMOS and BiCMOS processes. A left side photodiode array of tapered regions (53) of a first conductivity type is disposed into an epitaxil layer of a second conductivity type. This array of photodiodes is coupled together and further coupled to a first output terminal (43). A right side photodiode array of tapered regions (55) of said first conductivity type is disposed into the epitaxial layer of the second conductivity type, spaced apart from the left side photodiode by a minimum distance. A second output terminal is coupled to the array of right side photodiodes (51). An incident light spot (39) is focused onto the sensor. The amount of current generated at the first and second output terminals (43, 51) will be proportional to the area of the left photodiode array and the area of the right photodiode array which is receiving light.

Abstract: A method of fabricating a semiplanar heterojunction bipolar transistor (10) includes forming a subcollector layer (12) and a collector layer (16) onto a substrate layer (14). A collector implant plug (18) is selectively implanted to connect the subcollector layer (12) to the surface of the heterojunction bipolar transistor (10). A second epitaxial growth process causes a base layer (22), an emitter layer (24), and an emitter cap layer (26) to form on the collector layer (16) and the collector implant plug (18). By this process, the base layer (22) is not exposed to subsequent harmful fabrication steps. A base plug region (28) is selectively implanted to connect the base layer (22) to the surface of the heterojunction bipolar transistor (10). A base contact (32) and an emitter contact (30) are selectively formed within the heterojunction region on the base plug region (28) and the emitter cap layer (26), respectively.

Abstract: A snap acting control member (10, 10b) having high actuating temperatures comprises metal layers metallurgically bonded together with a low expansion (12) and a relatively high expansion layer (14) each having similar moduli of elasticity and the low expansion layer being formed of a precipitation hardenable stainless steel so that after forming into a dished shaped configuration to make the member snap acting the low expansion layer is heat treated to increase the strength. The control member can be used solely to sense temperature or it can be used as an electrical current carrying member. When used in the latter manner, the electrical resistivity of the member can be adjusted by interposing a selected layer (16) between layers (12) and (14) to thereby increase or decrease the resistivity of the member (10b) depending on the particular metal chosen for the interlayer.

Abstract: A multiplex system wherein each of the multiplex circuits includes a hold switch and hold capacitor, a standard class A differential amplifier with constant feeding current source, a multiplex switch to selectively isolate each multiplex circuit from the common multiplex line and a second current source supplying much larger current than the constant feeding current source selectively couplable in parallel with the constant feeding current source to the differential amplifier during periods when the differential amplifier is coupled to the common multiplex line.

Abstract: A socket having contact elements (22, 22', 50, 89) movable into and out of engagement with terminal leads (14a, 87) of an electrical component has a connection assembly (28, 34; 28', 34'; 58, 60, 66; 90, 91, 95) rotatably mounted to the base (10, 52, 80) of the socket for moving the contact elements into and out of engagement with the terminal leads. The connection assembly is driven by a movable cover (12) or by a motor (46) through a shaft (26, 54) which may be interconnected with comparable shafts on other sockets.

Abstract: A method of fabricating a heterojunction bipolar transistor and the transistor by providing a substrate of a group III-V semiconductor material, doping a first selected region at a surface of the substrate a predetermined first conductivity type, concurrently or separately incorporating a group III element into a portion of the first selected region, doping the portion of the first selected region to a second conductivity type with a laser beam to cause melting and subsequent recrystallization of said substrate and forming contacts to the portion of the first selected region and to the first selected region. The portion of the first selected region extends farther into the substrate than the remainder of the first selected region. A complementary transistor can be concurrently fabricated using the same steps except that p-implants replace the n-implants and n-doped InGaAs instead of p-doped InGaAs forms the base layer.

Abstract: An integrated circuit has a clock input pad and circuitry operative in response to a clock signal. Clock transitions at the clock input pad are potentially subject to glitches due to noise and ringing. Further provided is a glitch remover circuit having a logic gate having first and second inputs. The glitch remover circuit has a series of circuits coupled to the clock input pad with differing delays for positive edges than for negative edges. The series of circuits has an output connected to the first input of the logic gate, with the second input coupled to the series of circuits intermediately. Other devices, systems and methods are also disclosed.

Abstract: AC stabilization and temperature compensation improves phase margin and permits high temperature (significantly above 125.degree. C.) operation for an exemplary low drop-out voltage regulator with a PNP output transistor. The low drop-out voltage regulator (FIG. 1) includes a PNP output transistor (Q.sub.OUT) together with a voltage reference circuit (12), a gain circuit (14), and a current limit circuit (16). To provide AC stabilization, a small internal capacitor (C.sub.INT) of about 10 pF is coupled between the input of the gain circuit and the base of the output PNP, using Miller multiplication to substantially increase the effective capacitance of the stabilization capacitor, and introducing a zero into the gain-phase plot for the voltage regulator, substantially cancelling the pole, with a concomitant increase in phase margin. To provide temperature compensation, a dual-collector temperature compensation PNP (Q.sub.

Abstract: There is disclosed a system and method for demodulating an analog signal using digital conversion of the analog signal. In one embodiment the incoming modulated signal is digitally sampled and a calculation is made as to both the short term and long term energy of the digitized version of the analog signal. The deviation between the short and long term energy levels is used to determine the amount of modulation of the incoming analog signal. An analog demodulated signal is then reconstructed from the digitized deviation calculations. In an alternate embodiment, a digital signal processor is used to derive the demodulated signal.

Abstract: A self-aligned bipolar structure for use on SOI (silicon on insulator) substrates is described. This structure does not require etching poly and stopping on single crystal silicon. This is also a process of forming a MOS transistor and a vertical, fully self-aligned bipolar transistor on an insulating substrate.

Abstract: A bistable deformable mirror device (DMD) pixel architecture is disclosed, wherein the torsion hinges are placed in a layer different from the torsion beam layer. This results in pixels which can be scaled to smaller dimensions while at the same time maintaining a large fractional active area, an important consideration for bright, high-density displays such as are used in high-definition television applications.

Abstract: A mesa (31) is formed from polyimide (or a similar polymer material) to achieve a high thermal resistance. In an exemplary thermal imaging application, an array of thermal isolation mesa structures (30) are disposed on an integrated circuit substrate (20) for electrically connecting and bonding a corresponding focal plane array (5) of thermal sensors (10). Each mesa structure (30) includes a polyimide mesa (31) over which is formed a metal conductor (32) that extends from the top of the mesa down a mesa sidewall to an adjacent IC contact pad (22). When the focal plane array (5) is bonded to the corresponding array of thermal isolation mesa structure (30), a thermally isolated, but electrically conductive path is provided between the sensor signal electrode (16) of the thermal sensor (10) and the corresponding contact pad (22) of the integrated circuit substrate (20).

Abstract: A digital memory system of the type which includes an amplifier transistor connected to provide an amplified bit line signal corresponding to the state of a selected memory cell. A bit line pull-up transistor is positioned to function as a bit line current source and as a load device for the amplifier transistor. The amplifier transistor is connected between the pull-up transistor and the bit line and an output node positioned between the pull-up and amplifier transistors provides the amplified bit line signal corresponding to the state of a selected memory cell.

Abstract: A Global Position System (GPS) receiver is disclosed which includes an RF converter and quadrature digitizer implemented in hardware and a signal processor including a computer, code generator and preprocessor. The preprocessor has a divide by 1,2,3 divider for controlling the code generator so as to provide I,Q early, prompt and late digital signals of 0.5 chip separations to the computer for tracking code phase, carrier phase/frequency and signal amplitude. This structure eliminates the need for numerically controlled oscillators implemented in hardware while maintaining accurate performance.