Patents Represented by Attorney Renaissance IP Law Group LLP
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Patent number: 8338962Abstract: A semiconductor package may include a package substrate having a first surface and a boundary that may be defined by edges of the package substrate. The package further includes a first semiconductor chip having a front surface and a back surface. The back surface of a first portion of the first semiconductor chip may be disposed on the first surface of the package substrate with the back surface of a second portion of the first semiconductor chip extending beyond of the defined boundary of the package substrate. The semiconductor package may also include a second semiconductor chip disposed on the back surface of the second portion of the first semiconductor chip that extends beyond the defined boundary of the package substrate.Type: GrantFiled: March 27, 2011Date of Patent: December 25, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Won-gi Chang, Tae-sung Park
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Patent number: 8338221Abstract: A method for manufacturing a thin film type solar cell is disclosed, which is capable of reducing degradation of solar cell by decreasing the number of dangling bonding sites or SiH2 bonding sites existing in amorphous silicon owing to an optimal content ratio of ingredient gases, an optimal chamber pressure, or an optimal substrate temperature during a process for depositing an I-type semiconductor layer of amorphous silicon by a plasma CVD method, the method comprising forming a front electrode layer on a substrate; sequentially depositing P-type, I-type, and N-type semiconductor layers on the front electrode layer; and forming a rear electrode layer on the N-type semiconductor layer, wherein the process for forming the I-type semiconductor layer comprises forming an amorphous silicon layer by the plasma CVD method under such circumstances that at least one of the aforementioned conditions is satisfied, for example, a content ratio of silicon-containing gas to hydrogen-containing gas is within a range betweType: GrantFiled: December 1, 2009Date of Patent: December 25, 2012Assignee: Jusung Engineering Co., Ltd.Inventors: Chang Ho Lee, Hyung Dong Kang, Hyun Ho Lee, Yong Hyun Lee, Seon Myung Kim
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Patent number: 8328940Abstract: In one embodiment, a transfer robot for transferring a substrate includes a supporting means, a transfer robot arm including a first sub-robot arm and a second sub-robot arm arranged over the supporting means, an inner rail and an outer rail adjacent to the inner rail overlying the supporting means. The first sub-robot arm is adapted to move in a straight line motion along the inner rail and the second sub-robot arm is adapted to move in a straight line motion along the outer rail. The second sub-robot arm surrounds the first sub-robot arm.Type: GrantFiled: March 4, 2011Date of Patent: December 11, 2012Assignee: Jusung Engineering Co., Ltd.Inventors: Jae-Wook Choi, Young-Rok Kim
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Patent number: 8315090Abstract: A non-volatile memory array includes a plurality of word-lines and a plurality of columns. One of the columns further includes a bistable regenerative circuit coupled to a first, a second, a third, and a fourth signal lines. The column also includes a non-volatile memory cell having current carrying terminals coupled to the first and second signal lines and a control terminal coupled to one of the plurality of word-lines. The column further includes a first transistor and a second transistor. The first transistor is coupled to the first terminal of the bistable regenerative circuit, and to a fifth signal line. The second transistor has a first current carrying terminal coupled to the second terminal of the bistable regenerative circuit, and a second current carrying terminal coupled to a sixth signal line. The gate terminals of the first and second transistors are coupled to a seventh signal line.Type: GrantFiled: October 12, 2010Date of Patent: November 20, 2012Assignee: Grandis, Inc.Inventor: Adrian E. Ong
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Patent number: 8315080Abstract: Provided are a luminescent device and a method of manufacturing the same. The luminescent device includes a charge trapping layer having bistable conductance and negative differential resistance (NDR) characteristics, and an organic luminescent layer electrically connected to the charge trapping layer. The charge trapping layer comprise a nanocrystal layer intervened in an organic layer, and the nanocrystal layer comprises a plurality of nanocrystals.Type: GrantFiled: April 23, 2008Date of Patent: November 20, 2012Assignee: IUCF-HYUInventors: Jea Gun Park, Gon Sub Lee, Su Hwan Lee, Dal Ho Kim, Sung Ho Seo, Woo Sik Nam, Hyun Min Seung, Jong Dae Lee, Dong Won Shin
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Patent number: 8293651Abstract: A method of forming a thin film pattern includes: forming a thin film on a substrate; forming an amorphous carbon layer including first and second carbon layers on the thin film, wherein the first carbon layer is formed by one of a spin-on method and a plasma enhanced chemical vapor deposition (PECVD) method and the second carbon layer is formed by a physical vapor deposition (PVD) method; forming a hard mask layer on the amorphous carbon layer; forming a PR pattern on the hard mask layer; forming a hard mask pattern by etching the hard mask layer using the PR pattern as an etch mask; forming an amorphous carbon pattern including first and second carbon patterns by etching the amorphous carbon layer using the hard mask pattern as an etch mask; and forming a thin film pattern by etching the thin film using the amorphous carbon pattern.Type: GrantFiled: October 28, 2008Date of Patent: October 23, 2012Assignee: Jusung Engineering Co., Ltd.Inventors: Hui-Tae Kim, Bong-Soo Kwon, Hack-Joo Lee, Nae-Eung Lee, Jong-Won Shon
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Patent number: 8288210Abstract: In one embodiment, a semiconductor package may include a semiconductor chip having a chip pad formed on a first surface thereof, a sealing member for sealing the semiconductor chip and exposing the first surface of the semiconductor chip, a conductive wiring overlying a part of the first surface of the semiconductor chip and directly contacting a part of an upper surface of the sealing member. The conductive wiring further contacts the pad. The semiconductor package may also include an encapsulant covering the conductive wiring and having openings for exposing parts of the conductive wiring.Type: GrantFiled: March 6, 2011Date of Patent: October 16, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-gi Lee, Sang-wook Park, Ji-seok Hong
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Patent number: 8280693Abstract: There is provided a nondestructive analysis for a periodic structure. In the method, a virtual periodic structure is set and divided into a plurality of layers. By utilizing the Lippmann-Schwinger equation with an M-th order interpolation, physical properties related to reflectivity or transmittance of the virtual periodic structure are calculated. An M-th order interpolation formula employed in discretization of the Lippmann-Schwinger equation leads to an accurate and rapid calculation of the physical properties of the periodic structure.Type: GrantFiled: April 8, 2010Date of Patent: October 2, 2012Assignee: University-Industry Cooperation Group of Kyung Hee UniversityInventors: Young Dong Kim, Jin-Mo Chung, Seung-Ho Han
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Patent number: 8213221Abstract: Techniques and device designs associated with devices having magnetically shielded magnetic or magnetoresistive tunnel junctions (MTJs) and spin valves that are configured to operate based on spin-transfer torque switching.Type: GrantFiled: May 11, 2011Date of Patent: July 3, 2012Assignee: Grandis, Inc.Inventors: Yunfei Ding, Zhanjie Li
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Patent number: 8186027Abstract: Piezoelectric vibrators may be fabricated by forming a piezoelectric body of piezoelectric sheets, of which thickness is controlled, and simultaneously sintering the sheets along with cover layers, on which grooves are formed, and may be fabricated by laminating the piezoelectric sheets, of which the thickness is controlled, providing internal electrodes between the sheets, and forming external electrodes insulated from the internal electrodes.Type: GrantFiled: August 14, 2008Date of Patent: May 29, 2012Assignee: Innochips TechnologyInventors: In Kil Park, Duk Hee Kim
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Patent number: D672321Type: GrantFiled: March 2, 2012Date of Patent: December 11, 2012Assignee: Innochips Technology Co., Ltd.Inventors: In Kil Park, Dae Kyum Kim, Young Sul Kim, Seung Hwan Lee