Abstract: A lead frame of a plastic integrated circuit package is fabricated in two steps. First, from a rectangular sheet of metal, lead fingers of the lead frame are formed. Second, the die pad of the lead frame is clamped and is simultaneously separated and downset from the lead fingers of the lead frame by shearing the lead frame with a mated punch die pair. Performing the separation and downset of the die pad from the lead fingers results in essentially no horizontal gap between the lead fingers and the die pad. The downset of the die pad with respect to the lead fingers results in a vertical separation between the die pad and the lead fingers.

Abstract: An integrated circuit structure provides a burn-in stress test mode that facilitates stress testing of an integrated circuit device in a burn-in oven. The integrated circuit structure is capable of disabling a time-out feature of an IC memory device during a stress test mode of the device in order to facilitate stress testing of the device in a burn-in oven. The test mode structure of the IC memory device has a number of bipolar transistors, a number of ETD transistors coupled to the bipolar transistors, and a logic element coupled to the bipolar and ETD transistors at a node. The ETD transistors operate to ensure that the emitter of corresponding bipolar transistors have a voltage of Vb−Vbe.

Abstract: An integrated circuit structure and method provides a burn-in stress test mode that facilitates stress testing of an integrated circuit device in a burn-in oven. The integrated circuit structure and method is capable of disabling a time-out feature of an IC memory device during a stress test mode of the device in order to facilitate stress testing of the device in a burn-in oven. The integrated circuit structure provides for entry into the burn-in stress test mode when a supply voltage supplied to the integrated circuit device exceeds a predetermined voltage level and/or the temperature of the integrated circuit device exceeds a predetermined temperature level.

Abstract: Parallel processing in the form of two PR4 Viterbi Detectors connected in parallel operates to increase the maximum channel speed of a given data channel of a magnetic media. According to a target equation defined as Read(D)=(1−D2)2Written(D), in which D is the delay of a data of the channel, a first Viterbi Detector processes even data samples of the channel that have been equalized according to the target equation and a second Viterbi Detector connected in parallel processes odd data samples of the channel that have likewise been equalized according to the target equation. The use of two parallel-connected Viterbi Detectors in this fashion allows data to be processed at half-rate rather than full-rate, thereby increasing the overall channel speed.

Abstract: An active headset providing for reduction of external noise over a given frequency range by means of a microphone which generates an external noise representative signal processed and fed to a loudspeaker to produce an external noise cancellation signal spectrum, wherein a bridge amplifier circuit is interposed between the microphone and the loudspeaker and the gain of the bridge amplifier for peak amplitude of the noise cancellation signal is user adjustable without substantially reducing the breadth of the given frequency range over which noise reduction is effective.

Abstract: According to the present invention, by setting the logic state of one or more delay signals to appropriate values, the resistive value of a plurality of power supply delay elements throughout an integrated circuit having distributed circuit blocks may be modified to produce desired delay times or pulse width adjustments throughout the integrated circuit. Setting delay signals to desired logic states may be accomplished by a variety of means including forcing test pads to a logic level, blowing fuses, or entering into a test mode.

Abstract: A digital computer system for displaying a computer generated terrain representing a 3-dimensional depiction of the real world terrain surrounding a vehicle in real-time while the vehicle is in motion. This 3-D (3-Dimensional) image is rendered in real time while the vehicle is in motion and uses Global Positioning System (GPS) or differential GPS (dGPS) data available from a GPS unit and translates that data into virtual space within an Image Generation Processing block of the digital computer system. The digital computer system generates a virtual world 3-D image representing the eye-point position of the vehicle and directional vector into a terrain database.

Abstract: A vibration control system includes a processor-based circuit which monitors and controls an analog vibration control circuit. The system include, a sensor to detect the undesirable vibrations and a synchronous pulse generator for determining the fundamental frequency of the vibrations emitted by the source. An actuator produces anti-noise to counter unwanted vibrations. The processor circuit tests the system, monitors system functions, and adjusts various parameters to provide optimal performance.

Abstract: A circuit for driving a voice coil motor used to position the heads of a disk drive is disclosed. The circuit consists of a an H-bridge circuit, a controller, and a feedback loop. The feedback loop prevents the BEMF from driving a voltage on the voice coil motor above the supply voltage.

Abstract: A plastic pin support of a plastic PGA package is used to hold conductor pins in alignment, for electrical contact, with a printed circuit board and a socket. The printed circuit board is mounted on the plastic pin support which is electrically connected to respective conductor pins of the plastic pin support. A first adhesive layer, containing silver fillers, connects a silicon chip housed in the plastic PGA package to a heat sink and conducts heat from the silicon chip to the heat sink. The first adhesive layer also absorbs thermal expansion variations between the silicon chip and the heat sink during thermal cycles. A second adhesive layer connects the printed circuit board to the heat sink.

Abstract: A circular cleat apparatus allows a user to quickly and easily adjust in both directions the length and tension of an elongated cord. The circular cleat apparatus employs a circular cleat where a portion of the circular cleat provide engaging members to grip the elongated cord. The other half of the circular cleat is smooth. The elongated cord is guided through a rope guide on the circular cleat and positioned between the lateral walls of the circular cleat to provide a simple positive anchor. The circular cleat could be used alone simply for the purpose of securing ropes, bungie cords, and similarly configured flexible elongated cords or to tightening elongated cords together.

Abstract: The cross-sectional area of a thin-film transistor (TFT) is decreased in order to minimize bitline to supply leakage of the TFT. This is accomplished by utilizing a spacer etch process to manufacture a TFT having a very narrow and thin channel in a controllable manner. The spacer dimensions of the TFT may be adjusted by simply modifying the thicknesses of the poly gate and the channel poly. The channel thickness is limited by the thickness of the deposited channel polysilicon which may be as thin as approximately 300 .ANG. to 500 .ANG., and the channel width of the TFT corresponds to the height of the spacer etched along the polysilicon gate of the device which may be as small as approximately 0.15 to 0.25 .mu.m.

Abstract: A control system for controlling periodic disturbances employing a delayed inverse filter (5), a variable delay (6), a controller, a system model (4) and a comb filter (9).

Abstract: A closed system for reclaiming ink, solvent, and water from waste lithographic ink, or other ink types, without generating hazardous by-products is disclosed. The recycling process is performed under vacuum conditions on standard equipment, such as an agitation station, an evaporator chamber, a grinder, a condensation tank, and a vapor exhaust recovery condenser, readily available in the ink industry. Waste ink containing ink solids, solvent, water, and possibly foreign material such as debris, lint, paper, and dust, is first mixed to create a homogeneous slurry mixture of the ink, solvent, water and foreign materials. Next, water and solvent is evaporated from the slurry mixture and collected so that it may condensate and then settle. The slurry mixture is ground and heated up in order to evaporate any remaining water and solvent from the slurry.

Abstract: According to the present invention, a time filter prevents unintentional static entry into a test mode. Static entry is delayed an appropriate period of time after receipt of the required stimulus to enter the test mode. The delay period is chosen to be longer than transient conditions present in noisy operating environments such that static entry into the test mode is not accidentally triggered. Only when a super voltage condition is applied to an integrated circuit pin for the duration of a predetermined delay time can static entry to a test mode be accomplished. Exit from a test mode occurs immediately after the stimulus is removed. Delay circuitry of the present invention comprises a plurality of transistors, a schmitt trigger, and a delay element, and the delay circuitry determines the value of the predetermined voltage level and the predetermined delay time.

Abstract: The present invention is directed to a voltage controlled single-package integrated circuit device, capable of thermal compensation, for biasing a quasi-linear bipolar device. The bias circuit also provides a low impedance source to a RF device so that the bias point does not dynamically change with the RF signal, thus improving linearity. Changes in the base-emitter voltage level of the RF device are monitored by a reference diode to provide automatic temperature compensation. The reference diode is in close thermal proximity to the RF device, allowing for accurate thermal tracking. The base-emitter voltage may be electronically adjusted by means of a control voltage input, such being suitable for hook-up to a computer system having a digital to analog convertor thereby allowing for fine voltage adjustments. The control voltage may also be used to adjust the class of operation of the RF device or provide external temperature control.

Abstract: An output driver stage for an integrated circuit device includes slew rate control on the final logic gate. Slew rate control is provided by resistors located in the power supply path for the gate. A switch is connected in parallel across the resistor, and can be used to short the resistor to disable or reduce slew rate limiting. The switch is connected to another location within the output circuitry, and disables or reduces the slew rate limiting resistor during a portion of the switching cycle. This provides for slew rate limiting during a portion of switching when it is most needed, and disables it when slew rate limiting is not required.