Patents Represented by Attorney, Agent or Law Firm Renner, Otto, Boissellle & Sklar, LLP
  • Non-reducing process for deposition of polysilicon gate electrode over high-K gate dielectric material
    Patent number: 6451641
    Abstract: A process for fabricating a semiconductor device, including providing a semiconductor substrate; depositing on the semiconductor substrate a layer of a high-K gate dielectric material; depositing on the gate dielectric material layer a polysilicon or polysilicon-germanium gate electrode layer, in which the step of depositing the polysilicon or polysilicon-germanium gate electrode layer includes providing non-reducing conditions in a CVD apparatus.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: September 17, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Arvind Halliyal, Robert Bertram Ogle, Jr., Joong S. Jeon, Fred Cheung, Effiong Ibok