Patents Represented by Attorney Richard D. Laumann
  • Patent number: 5198656
    Abstract: An optical switch in which states are defined by dynamic charge storage, rather than contention resolution, and which switches using pulsed radiation having a wavelength somewhat longer than the exciton wavelength in a SEED diode. The switch does not exhibit or need bistability but switches at a relatively low energy as compared to S-SEEDS switched at the exciton wavelength.
    Type: Grant
    Filed: June 6, 1991
    Date of Patent: March 30, 1993
    Assignee: AT&T Bell Laboratories
    Inventor: Leo M. F. Chirovsky
  • Patent number: 5110756
    Abstract: Defect density in a semiconductor process sequence that uses two local oxidations is reduced by using an approximately 1:1 ratio of nitride to oxide thickness in the second local oxidation step and an annealing step.
    Type: Grant
    Filed: July 3, 1991
    Date of Patent: May 5, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: Richard W. Gregor, Chung W. Leung
  • Patent number: 5111255
    Abstract: A high transconductance field effect transistor is realized by controlling the doping level in a conducting channel buried beneath a heterointerface. In one exemplary embodiment, a channel comprising an undoped, high mobility, narrow band gap quantum well in combination with an intermediate band gap layer is formed beneath a heterointerface. The heterojunction interface is between a wide band gap layer and the quantum well region. A charge sheet having the same conductivity type as the wide bandgap layer is formed near the heterointerface. Advantageously, the transconductance is enhanced by conduction in the undoped filled quantum well region.
    Type: Grant
    Filed: June 5, 1990
    Date of Patent: May 5, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: Philip A. Kiely, Geoffrey W. Taylor
  • Patent number: 5102827
    Abstract: In the manufacture of semiconductor integrated-circuit devices, electrical contact to semiconductor regions such as, e.g., source and drain regions of field-effect transistors typically is made by a structure in which a silicide is intermediary to silicon and metal. The invention provides for processing, after window formation and before metal deposition, which includes deposition of a silicide-forming material, and annealing in a non-oxidizing atmosphere. Preferably, the atmosphere includes a component which forms a conductive compound with the silicide-forming material. Resulting contact structures have good step coverage, low contact resistance, low interdiffusion of metal into semiconductor, and fail-safe operation in the event of breaks due to electromigration. Moreover, in the case of misalignment of a window, a contact region may be extended laterally by dopant diffusion, thereby safeguarding the junction. Tolerance to window misalignment permits increased packing density, e.g.
    Type: Grant
    Filed: July 19, 1991
    Date of Patent: April 7, 1992
    Assignee: AT&T Bell Laboratories
    Inventors: Min-Liang Chen, Chung W. Leung
  • Patent number: 5100827
    Abstract: An integrated circuit having one or more antifuses which connect electrical components through a dielectric layer. The antifuse is formed before the thick dielectric is deposited and patterned to form windows which expose the antifuse.
    Type: Grant
    Filed: February 27, 1991
    Date of Patent: March 31, 1992
    Assignee: AT&T Bell Laboratories
    Inventor: Steven A. Lytle
  • Patent number: 5099149
    Abstract: A programmable circuit uses antifuse to program the circuit with the antifuses located not in the logic path but located so they control the voltage applied to the gate electrode of a transistor located in the logic path.
    Type: Grant
    Filed: December 19, 1990
    Date of Patent: March 24, 1992
    Assignee: AT&T Bell Laboratories
    Inventor: Bill W. Smith
  • Patent number: 5080279
    Abstract: Solder tape automated bonding of leads to an integrated circuit chip is performed using a constant temperature, flat faced thermode and a clamping plate to keep the leads in contact with the integrated circuit chip.
    Type: Grant
    Filed: June 27, 1990
    Date of Patent: January 14, 1992
    Assignee: AT&T Bell Laboratories
    Inventor: Kerry L. Davison
  • Patent number: 5068207
    Abstract: A planar surface is produced in integrated circuit processing by patterning a bilevel structure of a conductor and a sacrificial layer followed by directional deposition of a dielectric and lift off of the sacrificial layer. An additional dielectric layer may now be deposited if desired.
    Type: Grant
    Filed: April 30, 1990
    Date of Patent: November 26, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Ajit S. Manocha, Chen-Hua D. Yu
  • Patent number: 5021362
    Abstract: A single beam of radiation is split and part of the beam is directed to conductive links, e.g. runners on a substrate. Analysis of the incident beam and the beam reflected from the substrate permits a determination of when the link is blown and rendered non-conductive and when significant substrate involvement occurs.
    Type: Grant
    Filed: December 29, 1989
    Date of Patent: June 4, 1991
    Assignee: AT&T Bell Laboratories
    Inventor: James D. Chlipala
  • Patent number: 4985371
    Abstract: In the manufacture of an integrated-circuit device, periodic interruption of grain growth during chemical vapor deposition of a metal film results in enhanced surface smoothness and ease of patterning. Interruption of grain growth is by deposition of an auxiliary material which, in the interest of high conductivity of the film, may be conductive, may form a conductive compound or alloy, or may be eliminated upon additional metal deposition. When the metal is tungsten, silicon is a preferred grain-growth interrupting material.
    Type: Grant
    Filed: December 9, 1988
    Date of Patent: January 15, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: Virendra V. S. Rana, Nun-Sian Tsai
  • Patent number: 4935376
    Abstract: Integrated circuits are fabricated with thick self-aligned silicide runners on the field oxide by etching back the first dielectric to expose patterned polysilicon on the field oxide and then forming a silicide on the patterned polysilicon.
    Type: Grant
    Filed: October 12, 1989
    Date of Patent: June 19, 1990
    Assignee: AT&T Bell Laboratories
    Inventors: Steven J. Hillenius, Kuo-Hua Lee, Chih-Yuan Lu, Janmye Sung
  • Patent number: 4933297
    Abstract: Overetching of gate runners, which may be silicided, during window etching is prevented by opening windows in the dielectric to expose the top of the silicide layer on the runners and then depositing a metal, such as tungsten, which has a high etch selectivity with respect to the dielectric. Etching can then continue to open windows which expose the source/drain regions without overetching of the gate runners because the etch used has high selectivity with respect to the dielectric and the metal.
    Type: Grant
    Filed: October 12, 1989
    Date of Patent: June 12, 1990
    Assignee: AT&T Bell Laboratories
    Inventor: Chih-Yuan Lu
  • Patent number: 4894689
    Abstract: A transferred electron device is described in which the charge of the drifting packets is imaged perpendicular to the charge-packet direction so that essentially all of the packet-averaged, space-charge field is normal to the drift direction. This permits continuous formation of contiguous charge packets.
    Type: Grant
    Filed: December 28, 1984
    Date of Patent: January 16, 1990
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: James A. Cooper, Jr., Karvel K. Thornber
  • Patent number: 4879763
    Abstract: A bidirectional optical communications system is described using a multiple quantum well structure as both a photodetector and light modulator.
    Type: Grant
    Filed: February 21, 1986
    Date of Patent: November 7, 1989
    Assignee: AT&T Bell laboratories American Telephone and Telegraph Company
    Inventor: Thomas H. Wood
  • Patent number: 4861393
    Abstract: A molecular beam epitaxy method of growing Ge.sub.x Si.sub.1-x films on silicon substrate is described. Semiconductor heterostructures using Ge.sub.x Si.sub.1-x layers grown on either Ge or Si substrates are described.
    Type: Grant
    Filed: May 28, 1987
    Date of Patent: August 29, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventors: John C. Bean, Leonard C. Feldman, Anthony T. Fiory
  • Patent number: 4806997
    Abstract: A double heterostructure opto-electronic device capable of both electronic and photonic switching is described.
    Type: Grant
    Filed: January 22, 1988
    Date of Patent: February 21, 1989
    Assignee: AT&T Laboratories American Telephone and Telegraph Company
    Inventors: John G. Simmons, Geoffrey W. Taylor
  • Patent number: 4803540
    Abstract: A lead frame for mounting a semiconductor chip in an integrated circuit package incorporates a deformation absorbing member as an integral part of the paddle support arm so that the initial, desired physical and electrical characteristics are unaltered after a forming operation such as paddle downsetting.
    Type: Grant
    Filed: November 24, 1986
    Date of Patent: February 7, 1989
    Assignee: American Telephone and Telegraph Co., AT&T Bell Labs
    Inventors: Harold W. Moyer, Harry R. Scholz
  • Patent number: 4800051
    Abstract: Low temperature sintering of grade materials sintered to 99 percent of the theoretical density is described using TiO.sub.2 powder prepared by hydrolyzing titanium isopropoxide and calcining at 850.degree. C.
    Type: Grant
    Filed: April 13, 1987
    Date of Patent: January 24, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventor: Man F. Yan
  • Patent number: 4796996
    Abstract: Periodically modulating the temperature of a semiconductor laser while maintaining constant optical power permits very precise measurements of the operating parameters of the laser.
    Type: Grant
    Filed: August 14, 1987
    Date of Patent: January 10, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventor: Matthew J. Burns
  • Patent number: RE33693
    Abstract: An ordered-disordered transition is observed in semiconductor alloys which enables either the ordered or disordered structure to be produced.
    Type: Grant
    Filed: June 8, 1990
    Date of Patent: September 17, 1991
    Assignee: AT&T Bell Laboratories
    Inventors: John C. Bean, Abbas Ourmazd