Abstract: A circuit for randomizing data or de-randomzing previously randomized data according to a randomization scheme utilizing an irreducible generator polynomial which operates on a serial bit stream of words of data which is supplied to said circuit in a format, either LSB or MSB first, different from the format according to which the data was previously randomized or will be subsequently de-randomized. The circuit includes means for generating said irreducible generator polynomial; means for triggering said generating means in a given direction in response to a clock signal; means for exclusively ORing the contents of a bit in said generating means with a bit in said bit stream; and means for periodically interrupting said triggering means and instead setting the state of said generating means a predetermined number of states in a direction effectively the opposite to which said generating means normally generates data.

Abstract: A CD cleaner includes a rotary plate on which a CD can be loaded and unloaded and which is supported so as to be capable of corotation with the CD. The rotary plate is mounted on a base so as to be rotatable about a vertical shaft. A unidirectional rotating mechanism is interposed between the rotary plate and the base, and a supporting guide member is movably mounted on the base. Mounted on the guide member is a wiping device which undergoes reciproactive motion in a direction which intersects the rotating direction of the CD supported on the rotary plate.

Abstract: A camera having a recess for receiving a roll of film and a take-up mechanism for advancing the film, the film having registration holes along the edges thereof, is provided with a sprocketed wheel for engagement with the registration holes, the wheel advancing when the film is advanced by the take-up mechanism. The wheel is coupled to a mechanical flag, in one embodiment, and to an electronic indicator, in another embodiment, to warn the operator of the camera when the film is not advancing properly.

Abstract: An impact printer of the daisywheel type mechanically links together two daisywheel printer carriages so that the total number of different characters that can be printed is doubled. Suitable coordination logic provides for operation in a first concurrent (or parallel) mode where the user's software looks ahead to provide for continuous printing along a single line. The other mode of operation is sequential where the twin print heads are substantially transparent to the user's system and thus the appropriate print head automatically positions itself to a printing position.

Abstract: An electronic calculator or microprocessor system is provided with a semiconductor chip having a prechargeable and conditionally dischargeable instruction word memory, a program counter for addressing the instruction word memory, and a power up clear circuit. The power up clear circuit includes a latch circuit having two states, the first state being preferentially entered on when electrical power is first provided to the latch circuit and a second state which is entered at some time thereafter, and a gating circuit for interrupting the addressing of the instruction word memory by the program counter when said latch circuit is in the first state.

Abstract: An alphanumeric display system which may be implemented on one or more semiconductor chips for controlling display devices arrayed in N groups, each group of which comprises an A by B matrix of devices and which is capable of displaying a single alphanumeric character. The display devices in each group are sequentially addressed with display commands being communicated therewith in a predetermined manner to cause the display devices to visually display a predetermined alphanumeric character. Use of the alphanumeric display system herein disclosed, permits a total of A by B by N display devices to be controlled by the display system using as few as A + B + N connecting conductors to control the display devices and associated display driver devices.

Abstract: An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is implemented with a semiconductor chip having a hexadecimal/binary coded decimal format arithmetic unit for performing arithmetic operations on numeric data inputted by the keyboard further, the system preferably includes an input, an address register responsive to the input, a instruction word memory for storing a number of instruction words and addressable in response to the address stored in the address register, and instruction word decoder logic for decoding instruction words outputted from the instruction word memory and for controlling the arithmetic unit in response thereto. The arithmetic unit is operable in a first mode for providing an output from the arithmetic unit in binary coded decimal format and in a second mode providing an output from the arithmetic unit in hexadecimal format.

Abstract: A selectively alterable base numerical system in which a calculator implemented in a few semiconductor chips has a keyboard to enter numeric data and to command functions to be performed on the data by circuitry on the semiconductor chips in a first number base. The results of operations on the data in accordance with a selected function are then available as by way of a display. Circuitry is provided responsive to a keyboard base function input to change the results between number bases, preferably between hexadecimal, octal and decimal. A three chip calculator is provided where a data chip cooperates with two ROM chips and a manual keyboard input unit to permit operation selectively in any of several number bases and to change between bases at any point in a course of operations.

Abstract: Electronic calculators are manufactured by affixing conductors on an insulated substrate, by attaching a semiconductor logic and a tape-mounted display device to selected conductors and by interconnecting the conductors with a keyboard. The tape-mounted display device is provided with a plurality of leads carried by the tape different preselected distances from an axis of the display device. By using the method disclosed, the number of holes provided in the insulated substrate can be reduced or the use of such holes eliminated.

Abstract: An electronic calculator or microprocessor system having a selectively loadable instruction register is disclosed. The system preferably includes a data memory for storing numeric data, an arithmetic unit for performing arithmetic operations on the data stored in the data memory, an instruction memory for storing a plurality of instruction words, the instruction words controlling the operation of the system, and a program counter for addressing the instruction memory. The system is provided with a selectively loadable instruction register for temporarily storing the instruction word outputted from the instruction memory when enabled by an enabling signal. The enabling signal is provided by a first decoder logic circuit responsive to at least a portion of each instruction word outputted from the instruction memory for generating the enabling signal for a selected ones of the plurality instruction words.

Abstract: An improved connector having a printed wiring board structure and integrally connected to a printed wiring board. The connectors are suitable for use as part of a printed wiring board having a metal substrate. The connectors are finger-like structures, which mate either with other finger-like structures or with apertures in a printed wiring board. Both soldered and solderless connectors are disclosed.

Abstract: An electronic calculator or microprocessor system of a type preferably having keyboard input and the visual display is implemented with a semiconductor chip having an arithmetic unit, an address register responsive to the input, an instruction word memory for storing a number of instruction words and addressable in response to the address stored in the address register and an, instruction word decoder circuit for decoding instruction words outputted from the instruction word memory and for controlling the arithmetic unit in response thereto. An indirect addressing system includes an auxiliary register coupled to the output of the arithmetic unit for storing at least a portion of a word of numeric data outputted by the arithmetic unit and a branch logic system responsive to the decoding of a particular instruction word by the instruction word decoder logic for causing the address register to branch to a location defined by the contents of the auxiliary register.

Abstract: A user programmable calculator includes a keyboard, output display means and logic circuitry which generates to the output display means a prompting message indication of the type of data or function entry which the system's operative program, which may be a user stored program, next expects. The keyboard includes a special set of response keys in addition to the numerical and function keys normally incorporated on calculator systems. The special keys facilitate responding to data functional information requests by the calculator. The calculator may be programmed by the user to perform a series of functions upon data entries by entering a series of program steps from the keyboard or from a storage media such as magnetic card, paper tape or the like. The program steps which contain the prompting messages are stored in registers of the calculator system.

Abstract: A key debounce system for an electronic calculator or microprocessor system, wherein the calculator or microprocessor has a data memory for storing numeric data, an arithmetic unit for performing arithmetic operations on the data stored in the data memory, a program counter, an instruction memory for storing a plurality of instruction words controlling the operation of the microprocessor or calculator, one of the plurality of instruction words being outputted once each instruction cycle of the system according to an address stored in the program counter and a keyboard sensing circuit for interfacing the system with a keyboard.

Abstract: An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is provided with a semiconductor chip having an arithmetic unit for performing arithmetic operations on the numeric data received from the input, a memory for storing a number of instruction words addressable in response to said function commands, an instruction word decoder for decoding instruction words and for controlling the arithmetic unit in response thereto, first and second operational memories for storing numeric data received by said input or outputted from said arithmetic unit and a display system for displaying numeric data stored in a first one of the operational registers according to display codes stored in a second one of said operational registers, the display codes being indicative of which character positions in the display are to be blanked or to be provided with signals actuating a decimal point thereat.

Abstract: A synchronous state counter, which is responsive to an incrementing pulse for incrementing the state of the counter, is provided with a plurality of latches which output a binary representation of the number stored in the counter. Each latch is provided with a circuit for altering a state of the latch in response to a control signal. The control signal for the latch storing the least significant bit of the number is provided by the incrementing pulse. The control signals for the latches storing bits more significant than the least significant bit of the number is provided by a plurality of circuits responsive to the incrementing pulse and to the state of each latch supplying a bit less significant than the bit stored in the particular latch being controlled.

Abstract: A calculator, which may be used for educational purposes, for instance, is preferably provided with an integrated circuit, a display for displaying a number outputted by the integrated circuit, an array of key switches for inputting numeric and functional data to the integrated circuit, a keyset comprising an array of key switch push buttons moveably disposed in openings in a member retaining the array and a case in which the integrated circuit, display and the array of key switches are disposed. The case also is provided with an opening for removeably receiving the keyset, the keyset being disposed adjacent to the array of key switches when received in the opening. The calculator is preferably provided with a plurality of such keysets, the keysets each having different configurations of key push buttons for permitting an operator of the calculator to be able to access either to selected key switches or all key switches depending upon the particular keyset used.

Abstract: A DC to DC power supply, which includes simplified semiconductor circuitry and has features enabling the semiconductors to become non-conducting when the output is unloaded or causing battery connected to the input to charge when a higher than normal output voltage is applied to the circuit output.

Abstract: A pair of field effect transistors are arranged with interdigitated electrodes to reduce the voltage offset which can otherwise arise when the pair are operated as a differential amplifier. The interdigitated electrodes are arranged as essentially parallel elongated regions in a semiconductive substrate, certain regions serving as a first electrode for one of the field effect transistors, other regions serving as a first electrode for the other field effect transistor and still other regions serving as a common second electrode for both field effect transistors.