Abstract: An improved system for digital analysis of a composite modulated signal to determine difference in depth of modulation is disclosed. The system is useful, for example, in developing deviation signals for use in an ILS autoland system.

Abstract: The system described herein uses distance information from aircraft to multiple ground stations of the TACAN, VORTAC, VOR/DME or DME type to determine position of the aircraft to a high degree of accuracy exceeding the normal capabilities of these types of equipment. The present system uses a scanning type DME unit which is rapidly sequenced to interrogate said multiple ground stations successively and determine distance thereto for all stations within range, and a computer to validate and process these distance measurements in sequence to provide an accurate computation and display of aircraft position and wind information.

Abstract: The minimum shift keying (MSK) data detection system described compensates for the differential phase shift distortion produced by passing the MSK signal through a voice grade audio channel such as a VHF AM transmitter and receiver. This distortion varies and is dependent on the particular transmitter and receiver being used. The detection system examines the preamble of the MSK signal and measures the differential phase shift of the two modulating tone. This measured value is then used to establish pre-distorted waveforms to which the incoming data is compared for detection.

Abstract: An attitude indicator provides a display which combines the motion of an aircraft symbol with that of a background/horizon symbol to achieve the best features of conventional "inside-out" and "outside-in" types of attitude displays. The present invention is featured in the provision of a cueing control circuitry which, in response to inputted pitch and bank attitude indicative signals, effects the positioning of at least one of the aircraft symbol and the horizon indicating symbol of an attitude indicator as a function of at least one of the magnitude and rate of change characteristics of pitch and bank attitude signals inputted thereto.

Abstract: A high integrity multiple output power conditioner operating from redundant dc sources utilizes circuits to combine the sources to share a load and provide source isolation in event of component failure in any one of plural converters employed. Multiple ground planes permit high integrity checking of individual operation of multiple power converters employed in the system.

Abstract: A low noise wide bandwidth feedback amplifier is disclosed which enables improved matching and biasing of gallium arsenide field effect transistors. Matching and biasing is considerably simplified by the utilization of a gallium arsenide field effect transistor in conjunction with a bipolar transistor in such a manner that biasing and matching is accomplished with a considerable reduction in cost and component requirements as compared to existing gallium arsenide field effect transistor amplifier circuitries.

Abstract: A system for developing horizontal and vertical deflection signals for drawing a vector of predetermined length and angle on the face of a cathode ray tube is disclosed. Variable rate integrators are caused to integrate at rates respectively definitive of the sine and cosine functions of the vector angle for a period of time which is proportional to the length of the vector to develop Y and X deflection signal outputs which collectively define the vector.

Abstract: A controller for a vector generator used in drawing vector defined symbology on the face of a cathode ray tube is disclosed. Digital storage definitive of contiguous vectors which comprise each symbol to be drawn is addressed by a character address output from a microprocessor which also outputs rotation angle data. Rotation of each segment comprising a symbol is accomplished by simple addition of predetermined most-significant bits of the rotation angle data and segment angle data addressed from storage by the microprocessor, with the summation applied as addressing input to a ROM look-up table from which sine and cosine functions of the resultant angle are obtained. The sine and cosine functions are applied as inputs to respective integrators to establish their respective rates of integration over a period of time proportional to vector length.

Abstract: A flag receiver circuitry for either a low level or a high level flag input is described. By utilizing the common mode rejection capability that must be incorporated in a differential flag receiver circuit, the same circuit can be connected as a single ended input receiver for a high level flag by effecting a clamp of the inverting input terminal voltage of the differentially configured operational amplifier employed to provide a high level flag trippoint output.

Abstract: Attainment of exacting dynamic convergence or beam registration is realized in a multi-gun, multi-colored cathode ray tube display system which maintains beam superposition across the display area of the cathode ray tube regardless of scanning direction or scanning rate. The system is particularly effective in maintaining exacting convergence in random scanned displays wherein scanning direction and scanning rates vary considerably. Inherent lag differences in convergence force fields as compared to deflection force fields is compensated and corrected by the summation of each of the horizontal and vertical scan signals with a signal representing the sign and magnitude of the rate of change thereof and with this summation being applied to convergence signal development circuitry rather than the scan signal per se being applied as in conventional known convergence systems.

Abstract: A power generating and distribution system employs primary and emergency back-up standby generators with the primary generator normally powering a conversion supply from which critical supplies are directly connected to a user system and non-critical supplies are selectively connected to the user system through electronic switching devices. The switching means are activated by a monitor control which compares a sample of the primary generator voltage level with a reference level of the generator output powering the conversion supply and generates a control signal to close the electronic switching devices only when the monitor sample exceeds the monitor reference.

Abstract: 1. Means for searching across a frequency band and instantly stopping at any received frequency, comprising a detector, means for heterodyning said received frequency being connected to said detector, variable oscillator means, means for periodically varying said oscillator over a range of frequencies, means for injecting the frequencies of said oscillator in discrete steps into said heterodyning means, a pulse generator, a pulse-blocking bistable gate means coupling the output of said pulse generator to said oscillator means, pulse-shaping means associated with said detector to instantly form a pulse upon reception of said any received frequency, and means connecting the output of said pulse-shaping means to said gate means to open it in response to pulses from said pulse-shaping means, whereby the frequency variation of said oscillator means is discontinued and it provides a particular frequency in response to the output of said pulse-shaping means.

Abstract: 1.

Abstract: A stroke writing generator develops selectively incremented and/or decremented horizontal and vertical deflection signals which simultaneously deflect all color associated beams of a conventional shadow-mask multi-color cathode ray tube to cause the beams to trace out a selected symbology on the tube screen. A video color code generator, operating in clock-defined synchronism with the stroke writing generator, selectively effects turn-on permutations of plural video amplifiers driving associated electron beams in the cathode ray tube to facilitate preprogrammed color tinting of the displayed symbology.

Abstract: An arc-scanned sector cathode ray tube display system achieves constant writing speed by developing trigonometric X and Y deflection signals with amplitude linearly decreasing and scan rate linearly increasing as arcs are drawn from periphery toward apex of the display sector. Video/deflection synchronism is achieved by development of a video clock pulse train comprised of selected pulses from a clock source by means of which displayed video bits are shifted from rho-theta formated storage on a time/position basis such that video and beam position are synchronized to within one displayed picture element throughout the sector display.

Abstract: A multi-color display system employing a raster-scanned cathode ray tube having a single gun, single beam and without shadow mask. Vertical color stripe phosphor triads are carried on the face of the tube. During a predetermined one or ones of non-viewed raster lines, beam impingement on successive red stripes is optically detected and this sample pulse train is compared with a system clock defined reference pulse train which corresponds to red video on-times of the system.

Abstract: A monitor provides a continuously active assessment of the performance of a parallel communications bus by continuously comparing the binary level of the bus lines with system-defined levels which should be exhibited when the bus is in an "at rest" condition. Logic circuitry enables bus line logic level comparisons with "at-rest" condition reference values with any one discrepancy providing a latched invalid bus annunciation which is selectively enabled during periods when the bus is sensed to be in the "at-rest" condition.

Abstract: A system for developing a warning condition output signal when a monitored input variable exceeds a warn profile defined value defined as a predetermined function of an input reference variable, in which the warning condition output signal is delayed by a time .tau. from the time that a warning condition is sensed. The profile offset thus induced is compensated for by generating an anticipated future value of the reference variable after a time .tau. from the instant value and rate of change thereof, with the anticipated future value being utilized to generate the warn profile. Lag introduced by filtering which might be employed in generating the anticipated value, as well as any lag time existing between a reference variable failure and a failure condition signal which may be used to inhibit development of a warning condition signal, are then permissible, and are compensated for without profile offset by choosing a delay time .tau.

Abstract: A system for generating respective X and Y beam deflection command signals as respective running binary counts in X and Y deflection counters utilizing digital computations based on the straight line expressions Y=X tan .alpha., where .alpha. is the line slope. Relative clock rates are defined by the tan .alpha. relationship therebetween, and, by defining a line as lying in one of eight 45.degree. octants, and a circle as successive points of tangency of a plurality of lines tangent to the circle comprising circumferential segments in eight contiguous ones of the octants, the system effects generation of respective X and Y counts to trace a line of selected length and slope as well as a circle of selected radius utilizing but a single table of tangents for angles between 0.degree. and 45.degree. as the required data storage.

Abstract: Rate of change of the angle .theta. conveyed by a three-wire synchro signal is developed as an inherently normalized signal (d.theta./dt) by dividing N sin .theta. (d.theta./dt) signals by N sin .theta. signals and N cos .theta. (d.theta./dt) signals by N cos .theta. signals over selected ones of contiguous segments of a full 360.degree. range of .theta. where the divisor signals do not go through zero. The N sin .theta. and N cos .theta. signals are normalized outputs of dividers which divide synchro carrier reference demodulated sin .theta. and cos .theta. signals by a synchro carrier reference level signal. N sin .theta. and N cos .theta. signals are differentiated to derive the N sin (d.theta./dt) and N cos .theta. (d.theta./dt) signals. Logic circuitry switches appropriately signed ones of the signals as divisor and dividend inputs to an output divider whose output is (d.theta.