Abstract: A powerful, scaleable, and reconfigurable image processing system and method of processing data therein is described. This general purpose, reconfigurable engine with toroidal topology, distributed memory, and wide bandwidth I/O are capable of solving real applications at real-time speeds. The reconfigurable image processing system can be optimized to efficiently perform specialized computations, such as real-time video and audio processing. This reconfigurable image processing system provides high performance via high computational density, high memory bandwidth, and high I/O bandwidth. Generally, the reconfigurable image processing system and its control structure include a homogeneous array of 16 field programmable gate arrays (FPGA) and 16 static random access memories (SRAM) arranged in a partial torus configuration. The reconfigurable image processing system also includes a PCI bus interface chip, a clock control chip, and a datapath chip. It can be implemented in a single board.

Abstract: A memory cell having a memory cell state is disclosed. The memory cell state includes a memory unit configured to store a bit of data wherein the bit of data determines whether the memory cell state is a first state or a second state and a common state indicator line configured to indicate a common state associated with a group of memory cells. The memory cell state further comprises a logic circuit configured to compare the memory cell state to the common state and an output line is configured to indicate the result of the comparison. A method of identifying one or more minimum value elements in a set of elements is also disclosed. The method includes storing the values in a memory cell array having a plurality of sets of memory cells, each value being stored in a set of memory cells. The stored values are compared to a set of common state indicator lines configured to indicate the minimum value stored in the memory cell array.

Abstract: A system for generating an image comprising an illumination system having a light source and a plurality of holographic devices switchable between an active state wherein light from the light source is diffracted by the device and a passive state wherein the light is not diffracted by the device. A display device is positioned for illumination by the illumination system and operable to project a display image. The system further includes an optical projection device operable to receive the displayed image and form an intermediate image having a generally uniform illumination distribution on an optical diffuser. The diffuser is operable to project a resultant image with an emission angle larger than an emission angle of the display panel.

Abstract: A system and method are disclosed for creating an interactive web page. A plurality of objects are defined which are configured to have associated states. The associated states include a visible state and a hidden state. An object in the visible state is displayed and an object in the hidden state is not displayed. Subsets of objects are associated together in structures so that the state of any object within the structure is dependent on the states of other objects within the structure. The plurality of objects and the structures are placed into an hierarchy in a way which causes certain objects and structures in the hierarchy to be layered on top of other objects and structures in the hierarchy. Behaviors are associated with the objects, and each behavior includes an associated event, an associated action, and an associated target object. Each behavior is arranged so that when the associated event occurs, the associated action is performed on the associated target object.

Abstract: A system for encoding digital data with an M-ary (d,k) code to provide multi-level coded data where M>2 comprises an M-ary (d,k) encoder for accepting digital input data. The M-ary (d,k) coder encodes the digital input data to produce a plurality of code symbols, where each code symbol is at one of M levels and each pair of non-zero code symbols is separated by at least d but no more than k zeros. A waveform encoder converts the code symbols into waveform signal amplitudes compatible with a multi-level channel. Each waveform signal amplitude is generated by modulo M addition of a current code symbol with a previous waveform signal amplitude. A specific M=10(2,10) code provides high density recording to a multi-level storage medium. The M=10 (2,10) encoder is implemented using a seven-state encoder and a modulo ten waveform encoder.

Abstract: Techniques for designing polymer probes to verify the integrity of the probe synthesis are provided. Multiple probes with identical sequences are designed so that the probes will be formed utilizing at least one different monomer addition cycle. Based on the probes affinity to a control target, variations (e.g., errors) in probe synthesis may be identified.

Abstract: A system and method are disclosed for redirecting a connection from a first server having a first server IP address. Incoming SYN packets sent from a client are intercepted. The SYN packets have a destination IP address corresponding to the connection and the SYN packets are sent from the client for the purpose of establishing the connection, which is supported by the first server. The number of incoming SYN packets sent from the client to the first server is monitored and it is determined whether the number of unanswered SYN packets sent by the client to the first server exceeds a ditched connection threshold number of unanswered SYN packets. The destination IP address of intercepted incoming SYN packets is changed for the connection received after determining that the number of unanswered SYN requests sent by the client to the first server exceeds a ditched connection threshold number of unanswered SYN requests to the destination IP address of a second server.

Abstract: A system for providing a failover for designating a primary network device and a backup network device and providing direct communication between the primary network device and the backup network device. The cable includes a plurality of conductive wires having a primary end and a backup end. A primary connector is connected to the plurality of conductive wires at the primary end of the plurality of conductive wires. The primary connector has a primary plug driver pin and a primacy select pin, and the primary plug driver pin is connected to the primacy select pin. A backup connector is connected to the plurality of conductive wires at the backup end of the plurality of conductive wires, the backup connector has a grounded pin and a backup select pin and the backup grounded pin is connected to the backup select pin. Thus, the primary end of the failover cable is distinguishable from the backup end of the failover cable.

Abstract: A method of processing a transaction message is disclosed. The method includes receiving an incoming raw transport message. The raw transport message is stored in a channel interface database. A raw message identifier is generated. The raw message identifier is determined such that the raw message identifier verifiably identifies the raw message. A communications context identifier is generated. The communications context identifier is determined such that the communications context identifier verifiably identifies the raw message and the channel. The raw message is converted into a transaction message and the transaction message is validated.