Abstract: A microelectronic assembly including a plurality of conductive columns extending from a bond pad of a microelectronic device and a conductive adhesive on a land pad of a carrier substrate electrically attached to the conductive columns.

Abstract: Apparatus and methods of fabricating an under bump metallization structure including an adhesion layer abutting a conductive pad, a molybdenum-containing barrier layer abutting the adhesion layer, a wetting layer abutting the molybdenum-containing barrier layer, and high tin content solder material abutting the wetting layer. The wetting layer may be substantially subsumed in the high content solder forming an intermetallic compound layer. The molybdenum-containing barrier layer prevents the movement of tin in the high tin content solder material from migrating to dielectric layers abutting the conductive pad and potentially causing delamination and/or attacking any underlying structures, particularly copper structures, which may be present.

Abstract: A microelectronic die assembly including a heat dissipation device serving as a support structure for the assembly is described. A first microelectronic die is attached by a back surface to a first surface of the heat dissipation device. A first plurality of interconnects are disposed on an active surface of the first microelectronic die. A second microelectronic die is attached by a back surface to the first microelectronic die active surface. A second plurality of interconnects are disposed on an active surface of the second microelectronic die. Any appropriate number of microelectronic dice may be stacked in a like fashion.

Abstract: A microelectronic device and methods of fabricating the same comprising a microelectronic die having an active surface, a back surface, and at least one side. The microelectronic die side comprises a beveled sidewall and a channel sidewall. A metallization layer is disposed on the microelectronic die back surface and the beveled sidewall.

Abstract: The present invention includes an assembly for testing a socket. The assembly includes a plurality for probe pins extending from a housing. The housing includes a chamfered alignment guide for aligning the probe pins with openings in the socket.

Abstract: A method of dicing a microelectronic device wafer comprising forming at least one trench in at least one dicing street on the microelectronic device wafer, wherein the trench prevents cracking and/or delamination problems in the interconnect layer of the microelectronic device wafers caused by a subsequent dicing by a wafer saw.

Abstract: A method of fabricating a copper-containing structure, preferably within a microelectronic device, including a rapid temperature ramp from about 20 degrees Celsius up to between about 300 and 500 degrees Celsius, preferably about 400 degrees Celsius, at a rate of between about 20 and 60 degrees Celsius per second, preferably about 40 degrees Celsius per second.

Abstract: A microelectronic device and methods of fabricating the same comprising a microelectronic die having an active surface, a back surface, and at least one side. The microelectronic die side comprises a trench sidewall, a lip and a channel sidewall. A metallization layer is disposed on the microelectronic die back surface and the trench sidewall.

Abstract: A heat dissipation device having an integral load centering mechanism adapted to provide a location for contact between a spring clip and the heat dissipation device. The load centering mechanism is located in an area on the heat dissipation device which will provide a centered loading to a microelectronic die and constitutes substantially the only place where the spring clip contacts the heat dissipation device when the spring clip is providing a force against the heat dissipation device.

Abstract: A microelectronic die assembly including a heat dissipation device serving as a support structure for the assembly is described. A first microelectronic die is attached by a back surface to a first surface of the heat dissipation device. A first plurality of interconnects are disposed on an active surface of the first microelectronic die. A second microelectronic die is attached by a back surface to the first microelectronic die active surface. A second plurality of interconnects are disposed on an active surface of the second microelectronic die. Any appropriate number of microelectronic dice may be stacked in a like fashion.

Abstract: A microelectronic device and methods of fabricating the same comprising a microelectronic die having an active surface, a back surface, and at least one side. The microelectronic die side comprises a beveled sidewall and a channel sidewall. A metallization layer is disposed on the microelectronic die back surface and the beveled sidewall.

Abstract: Methods for thinning wafer-to-wafer vertical stacks in the fabrication of stacked microelectronic devices. The methods include physically removing unsupported portions of a wafer to be thinned in the vertical stack. The removal of the unsupported portions substantially eliminates potential cracking and chipping of the wafer, which can occur during the thinning process when the unsupported portions exist.

Abstract: Heat dissipation devices and molding processes for fabricating such devices, which have at least two regions comprising different conductive materials such that efficient thermal contact is made between the different conductive materials. The molding processes include injection molding at least two differing conductive materials.

Abstract: A stress shield made of a material having a CTE similar to that of the material used in the fabrication of a microelectronic die, including but not limited silicon, molybdenum, and aluminum nitride, which abuts at least one corner and/or edge of the microelectronic die. When the stress shield is positioned to abut the microelectronic die corners and/or edges, the mechanical stresses on the microelectronic die are greatly reduced or substantially eliminated.

Abstract: A microelectronic package including a first microelectronic die and a second microelectronic die with a plurality of standoffs extending therebetween and an encapsulation material disposed between the first microelectronic die and the second microelectronic die, which extends between at least two the plurality of standoffs.

Abstract: A stress shield made of a material having a coefficient of thermal expansion similar to that of the material used in the fabrication of a microelectronic die, including but not limited to silicon, molybdenum, and aluminum nitride. The stress shield abuts at least one corner and/or edge of the microelectronic die. When the stress shield is positioned to abut the microelectronic die comers and/or edges, the mechanical stresses on the microelectronic die are greatly reduced or substantially eliminated.