Abstract: A digital signal processing unit with an array of digital signal processors (DSP) is provided with a recirculation path for data sequences which cannot be fully processed by a single pass through the array. An input programmable gate array (PGA) controls distribution of data sequences to individual DSPs for processing and an output PGA controls their recollection. The recirculation path is provided by a recirculation register which is write enabled by the output PGA and read enabled by the input PGA.
Type:
Grant
Filed:
October 7, 1996
Date of Patent:
July 7, 1998
Assignee:
Timeplex, Inc.
Inventors:
Zigmunds Andis Putnins, Henry Christian Briel, III, Michael James Luddy
Abstract: A distributed digital communications network has an originating node and a multiplicity of destination nodes. The various nodes are interconnected by links and at least some of the nodes are accessible to other nodes only by multiple links. To save time in establishing the least cost path from an originating node to a destination node, the attributes of the various links are stored in memory at the originating node, a least cost path from the originating node to a destination node is calculated in response to a connection request and stored in memory. Then, when a subsequent connection request to any destination node requires the same link attributes as the least cost path already stored in memory, that same least cost path is used if it is still operational. Significant time saving is achieved in that no new least cost calculation need be made.