Abstract: A digital processor system including several function modules where each modules includes circuitry to perform at least one computational task and circuitry to transfer information containing that module's respective computational task capability to a logical arbiter upon initialization. Each module further includes circuitry to interface to the logical arbiter upon initialization to determine that module's address. Further disclosed is an information bus that connects all function modules together with the logical arbiter. The presence of the logical arbiter provides for a self-configuration capability upon initialization.

Abstract: The present invention is an emulator device for emulation of the functions and operation of a predetermined semiconductor device. A central portion of a semiconductor substrate of the emulator embodies the emulated semiconductor device. This embodiment of the emulated semiconductor device is an exact replica of the emulated device including all input and output connections. The emulator device further includes an additional set of input/output connections located on the periphery of the substrate outside the central portion. These additional input/output connections are connected to portions of the emulated device in the central portion of the substrate. These connections permit additional input signals to be coupled to the emulated device and additional output signals to be received from the device to enable greater control over and monitoring of the emulated device. This periphery preferably also includes further circuits for use in the emulator device for signal conditioning and the like.