Patents Represented by Attorney Robert E. Seed and Berry LLP Mates
  • Patent number: 5844404
    Abstract: A voltage regulator for electrically programmable non-volatile memory cells includes a gain stage which is supplied a voltage from a voltage booster connected to a supply voltage reference, having an input terminal connected to an output of a voltage divider and an output terminal connected to a pull-up transistor of a pull-up and pull-down differential pair to output the regulated voltage for programming at least one column or bit line of the memory cells. The voltage regulator also includes a second gain stage having an input terminal connected to a second output of the voltage divider. The second stage has an output connected to turn on the pull-down transistor in the complementary pair upon the regulated voltage exceeding a predetermined value.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: December 1, 1998
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Fabio Tassan Caser, Stefan Schippers, Marcello Cane
  • Patent number: 5834364
    Abstract: A reference sample for the calibration of a device for characterizing doses implanted on a wafer, consisting in defining a succession of at least two parallel strips on the wafer. The reference sample is produced by depositing a first implant mask on the wafer according to a pattern leaving a first strip accessible, performing a first ionic implant of a first dose, removing the first implant mask and depositing a second implant mask on the wafer according to a pattern leaving accessible the first strip as well as a second contiguous strip, performing a second ionic implant of a second dose, and removing the second implant mask.
    Type: Grant
    Filed: December 20, 1996
    Date of Patent: November 10, 1998
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventors: Alain Brun, Serge Lombard
  • Patent number: 5812017
    Abstract: A charge pump voltage booster circuit with control feedback of the type comprising an output line connected to a load and on which is produced an output voltage boosted in relation to a supply voltage and a feedback loop incorporating a charge pump connected to said line and a control logic circuit of said pump interlocked with a comparator having an input connected to the line comprises also an auxiliary charge pump connected in turn to said line and designed to supply a quantity of current greater than or equal to the leakage currents of the load in stand-by condition. The auxiliary pump has current consumption much lower than that of the main charge pump. In addition, upon emerging from the off state there is provided starting of the main charge pump for a brief time period sufficient to take the booster output to a sufficient value.
    Type: Grant
    Filed: December 5, 1995
    Date of Patent: September 22, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Carla Golla, William Vespi
  • Patent number: 5805022
    Abstract: A circuit having a double half-wave rectifier connected to the outputs of a differential amplifier in order to produce two quantities dependent on the amplitudes of the half-waves of the output signal of the amplifier. Two comparators each having an input are connected to an output of the rectifier and a reference input in order to produce respective output signals when the amplitudes of the respective half-waves are greater than the levels applied to the reference inputs. The circuit also has processing means for generating a signal for regulating the gain of the amplifier in dependence on the durations of the output signals of the two comparators. The circuit may advantageously be used when the signal to be amplified is not symmetrical.
    Type: Grant
    Filed: September 13, 1996
    Date of Patent: September 8, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Melchiorre Bruccoleri, David Demicheli, Marco Demicheli, Giuseppe Patti
  • Patent number: 5793679
    Abstract: A voltage generator for electrically programmable non-volatile memory cells, constructed of a number of charge pump circuits having inputs controlled by a number of phase generators. The charge pump circuits are laid as pairs of first and second charge pump circuits. The first charge pump circuits are active when the second charge pump circuits are inactive, and vice versa.
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: August 11, 1998
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Fabio Tassan Caser, Marco Dellabora, Marco Defendi
  • Patent number: 5770967
    Abstract: The invention relates to a charge-pump control circuit for a power transistor including a driver circuit connected to a first supply voltage through a diode and to a second voltage through a switch and a first load. The driver circuit is connected to the power transistor, and the power transistor is linked to a pump capacitor. The power transistor is connected between a further supply voltage and a second load. The control circuit of the invention further includes a control logic circuit connected between the first supply voltage and the second voltage. The control logic circuit is connected to the driver circuit and to the switch, and the switch is connected between the power transistor and the first load. The switch is also connected to the driver circuit, and to a circuit for checking the charged state of the pump capacitor which is connected between the switch and the control logic circuit.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: June 23, 1998
    Assignee: SGS-Thomson Microelectronics S.r.1.
    Inventors: Angelo Alzati, Aldo Novelli
  • Patent number: 5754473
    Abstract: A circuit for switching of power supply voltages in electrically programmable and erasable non-volatile semiconductor memory devices including a first switch-regulator block connected to a main power supply line with a programming voltage to generate a first programming voltage signal to be supplied to a memory device on a first programming line and a second switch-regulator block powered by the first programming line and designed to generate a second programming voltage to be supplied to the memory device on a second programming line. There is also provided a detector block connected to the first programming line to detect a reaching of a predetermined high level on the rising front of the first programming voltage signal and a reaching of a predetermined low level on the falling front of the first programming voltage signal and to emit at an output a corresponding enablement signal for a third regulator block located downstream.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: May 19, 1998
    Assignee: SGS-Thomson Microelectronics S.r. l.
    Inventor: Luigi Pascucci
  • Patent number: 5754417
    Abstract: A regulating circuit for the output voltage of a voltage booster, of the type which comprises a first charge transfer capacitor adapted to draw electric charges from the supply terminal and transfer them to the output terminal, through electronic switches controlled by non-overlapped complementary phase signals, and a second charge storage capacitor connected between the output terminal and ground, further comprises an error amplifier which generates, during one of the operational phases, a DC voltage corresponding to the difference between a reference voltage and a divided voltage of the output voltage of the voltage booster; this DC voltage is applied directly to one end of the transfer capacitor.
    Type: Grant
    Filed: October 29, 1996
    Date of Patent: May 19, 1998
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventor: Germano Nicollini
  • Patent number: 5731670
    Abstract: A circuit and method for driving a brushless sensorless direct current (DC) motor (2), using the steps of: at the beginning of each phase, driving the motor in PWM mode; monitoring the duration (Tc) between successive zero-crossings of the back electromotive force (BEMF), and accordingly predicting the next zero-crossing; and before the next predicted zero-crossing, switching to a linear driving mode only until the actual zero-crossing of the BEMF.
    Type: Grant
    Filed: March 27, 1996
    Date of Patent: March 24, 1998
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Ezio Galbiati, Giuseppe Maiocchi
  • Patent number: 5726992
    Abstract: A method of assessing the quality and/or existence of a biphase-modulated digital RDS signal in a radio signal broadcast by a radio transmitter and received by a radio receiver equipped for RDS, in which a bit rate clock signal is produced on the receiver side whose bit rate is identical to that of the RDS signal, the bits both of the RDS signal and of the bit rate clock signal are each composed of two half bits, and of the two RDS half bits belonging to an RDS bit, one has a positive phase and the other one has a negative phase, and in which, for quality or existence assessment, the number of positive phase signs and the number of negative phase signs are determined which are each contained in the RDS signal during the half bit periods of a predetermined number of n adjacent half bits of the bit rate clock signal, and the RDS signal, depending on whether or not the ratio between the number of positive phase signs ascertained and the number of negative phase signs ascertained corresponds to a predetermined nu
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: March 10, 1998
    Assignee: SGS-Thomson Microelectronics GmbH
    Inventor: Gerhard Roither
  • Patent number: 5719490
    Abstract: A dual sourced voltage supply circuit for use with a flash EPROM or the like and comprising output voltage circuitry including an input for receiving a control signal determining which of two voltage supplies is used to provide an output of the dual sourced voltage supply circuit. The output voltage is provided by one of the two voltage supplies by means of a controllable conductive path connected between one voltage supply and an output node of the circuit.
    Type: Grant
    Filed: August 31, 1995
    Date of Patent: February 17, 1998
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventor: Valeria Germini
  • Patent number: 5706240
    Abstract: A voltage regulator for electrically programmable, non-volatile memory devices has an output terminal connected to a power supply line for programming the state of at least one memory element through at least one selection circuit. At least first and second resistive elements are connected between first and second terminals of a voltage supply. At least a first circuit is matched to the at least one selection circuit, and the first circuit is coupled serially with the resistive elements between the two terminals of the voltage supply. At least one control current generator is connected between one of the first and second voltage supply terminals and a node linking to one of the resistive elements, and the current of the controlled current generator is controlled to be a function of current through the at least one selection circuit. An operational amplifier has an inverting input and a non-inverting input, and the non-inverting input is connected to a node linking to at least one of the resistive elements.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: January 6, 1998
    Assignee: SGS-Thomson Microelectronics S.r.L.
    Inventors: Carlo Fiocchi, Guido Torelli