Abstract: A microelectronic package and a method of forming the same comprising a microelectronic device attached by an active surface to a substrate. A heat dissipation device having a base portion is positioned over a back surface of the microelectronic device and having at least one lip portion extending from the base portion which is attached to the substrate. An inlet extends through the heat dissipation device base portion and is positioned to be over the microelectronic device back surface. A thermal interface material is dispensed through the inlet and by capillary action is drawn between the microelectronic device back surface and the heat dissipation device base portion.

Abstract: A method of fabricating microelectronic structure using at least two material removal steps, such as for in a poly open polish process, is disclosed. In one embodiment, the first removal step may be chemical mechanical polishing (CMP) step utilizing a slurry with high selectivity to an interlevel dielectric layer used relative to an etch stop layer abutting a transistor gate. This allows the first CMP step to stop after contacting the etch stop layer, which results in substantially uniform “within die”, “within wafer”, and “wafer to wafer” topography. The removal step may expose a temporary component, such as a polysilicon gate within the transistor gate structure. Once the polysilicon gate is exposed other processes may be employed to produce a transistor gate having desired properties.

Abstract: Methods of forming microelectronic devices by disposing a radiation curable underfill material or adhesive material between a substrate and a microelectronic die, and exposing any radiation curable material which bleeds-out therefrom to radiation before or immediately after disposition, thereby reducing the extent of material bleed-out.

Abstract: A compressible domed contact used as a portion of socket contact within an electrical socket to eliminate co-planarity issues and to achieve an effective electrical connection between the electrical socket and a microelectronic device. The compressible domed contact may be made of resilient material such that it will substantially return to its original shape after being compressed.

Abstract: Apparatus and methods of fabricating antennae embedded within a ceramic material, such as a low temperature co-fired ceramic. Such ceramic material has a low coefficient of thermal expansion which reduces expansion and contraction stresses that can cause the signal transmission frequency to change and thereby affecting proper signal transmission.

Abstract: A microelectronic device and methods of fabricating the same comprising a microelectronic die having an active surface, a back surface, and at least one side. The microelectronic die side comprises a trench sidewall, a lip and a channel sidewall. A metallization layer is disposed on the microelectronic die back surface and the trench sidewall.

Abstract: An assembly including a heat dissipation device having an attachment surface, a substrate having an attachment surface, and a plurality of metal balls extending between the heat dissipation device attachment surface and the substrate attachment surface. The assembly may include at least one microelectronic die disposed between the heat dissipation device attachment surface and the substrate attachment surface.

Abstract: A microelectronic package including a microelectronic die having through silicon vias extending through a back surface thereof, which allows both an active surface and the back surface of the microelectronic die to have power, ground, and/or input/output signals connected to a flexible substrate. The flexible substrate may further connected to an external substrate through at least one external contact.

Abstract: Methods for thinning wafer-to-wafer vertical stacks in the fabrication of stacked microelectronic devices. The methods include etching away unsupported portions of a wafer to be thinned in the vertical stack. The removal of the unsupported portions substantially eliminates potential cracking and chipping of the wafer, which can occur during the thinning process when the unsupported portions exist.

Abstract: An apparatus and methods for modifying isolation structure configurations for MOS devices to either induce or reduce tensile and/or compressive stresses on an active area of the MOS devices. The isolation structure configurations according to the present invention include the use of low-modulus and high-modulus, dielectric materials, as well as, tensile stress-inducing and compressive stress-inducing, dielectric materials, and further includes altering the depth of the isolation structure and methods for modifying isolation structure configurations, such as trench depth and isolation materials used, to modify (i.e., to either induce or reduce) tensile and/or compressive stresses on an active area of a semiconductor device.

Abstract: An enhanced joint thickness lead used for surface mounting electronic devices to a substrate, wherein a portion of the enhanced joint thickness lead that is substantially parallel to the substance. The enhanced joint thickness lead includes an arcuate structure, which provides an enhanced joint thickness for the solder used to connect the lead to the substrate. The enhanced joint thickness of the solder results in a more robust attachment of the electronic device.

Abstract: A microelectronic package and a method of forming the same comprising a microelectronic device attached by an active surface to a substrate. A heat dissipation device having a base portion is positioned over a back surface of the microelectronic device and having at least one lip portion extending from the base portion which is attached to the substrate. An inlet extends through the heat dissipation device base portion and is positioned to be over the microelectronic device back surface. A thermal interface material is dispensed through the inlet and by capillary action is drawn between the microelectronic device back surface and the heat dissipation device base portion.

Abstract: An iodine-containing thermal interface material disposed between a heat source and a heat dissipation device.

Abstract: A surface mount-type microelectronic component assembly which does not physically attach the microelectronic component to its carrier substrate. Electrical contact is achieved between the microelectronic component and the carrier with solder balls attached to either the microelectronic component or the carrier substrate. A force is exerted on the assembly to achieve sufficient electrical contact between the microelectronic component and the carrier substrate.

Abstract: A microelectronic substrate having a plurality of alternating substantially planar layers of dielectric material and conductive material, and further having a first surface and a second surface, wherein the dielectric material and the conductive material layers extend substantially perpendicularly between the first and second surfaces.

Abstract: A component retention socket, which allows through-hole mount electronic components to be attached to a substrate in a stabilized, vertical orientation, without requiring lead preparation.

Abstract: A microelectronic assembly including a flexible substrate with a first and a second surface, and with a microelectronic die portion and an external interconnect portion. The substrate has conductive traces integrated therewith. A first microelectronic die has an active surface electrically connected to the substrate first surface in the substrate microelectronic die portion. A second microelectronic die is electrically connected by its active surface to the substrate second surface in the substrate microelectronic die portion. External interconnect pads are disposed on the substrate second surface in the substrate external interconnect portion, wherein at least one conductive trace is in electrical contact with at least one external interconnect pad and with either the first microelectronic die, the second microelectronic die, or both. The substrate is folded and a portion of the first surface in the external interconnect portion is attached to a back surface of the first microelectronic die.

Abstract: A method of fabricating a feature on a substrate is disclosed. In a described embodiment the feature is the gate electrode of an MOS transistor. In this embodiment a polysilicon layer is formed on the substrate. Next, an edge definition layer of silicon nitride is formed on the feature layer. Then, a patterned edge definition layer of silicon dioxide is formed on the first edge definition layer. Then, a silicon nitride spacer is formed adjacent to an edge of the patterned second edge definition layer. Finally, the polysilicon layer is etched, forming the transistor gate electrode from the polysilicon that remains under the spacer.

Abstract: Heat dissipation devices and molding processes for fabricating such devices, which have at least two regions comprising different conductive materials such that efficient thermal contact is made between the different conductive materials. The molding processes include injection molding at least two differing conductive materials.

Abstract: An apparatus and method for dissipating static electrical charge following a manufacturing operation is disclosed. A semiconductor package is provided with ground pads that are located to assure electrical contact with ejection pins used to translate the package from one position to another. Static electricity builds up on the semiconductor package. The ejection pins provide the pathway for dissipating static electrical charge out of the semiconductor package.