Patents Represented by Attorney, Agent or Law Firm Robert Hightower, Atty.
  • Method of forming a semiconductor device and structure therefor
    Patent number: 6613622
    Abstract: A semiconductor device (10, 40) is formed to have a well (19) in a substrate (11). The well and the substrate have the same doping type, for example both P-type or both N-type. Low resistance contact regions (26, 27) of a second conductivity type are formed to at least abut the well. A drain (17) is formed within one low resistance contact region. A source (12) is formed in the substrate and laterally displaced from the other low resistance contact region. A buried layer (21, 22, 23) is formed laterally across the well.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: September 2, 2003
    Assignee: Semiconductor Components Industries LLC
    Inventors: Rajesh S. Nair, Takeshi Ishiguro
  • Method of forming a voltage detection device and structure therefor
    Patent number: 6605978
    Abstract: A voltage detection device (10, 30) utilizes grounded gate J-FET transistors (16,17,18) to detect desired input voltage values. The grounded gate J-FET transistors (16,17,18) function in different modes as the input voltage varies to facilitate detecting the desired input voltage values.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: August 12, 2003
    Assignee: Semiconductor Components Industries LLC
    Inventors: Josef Halamik, Frantisek Sukup