Abstract: Methods, systems, and computer program products centrally manage references to objects recently employed by a user operating in a software development environment. After transmission of collection messages to plural applications, a receiver centrally managing object references receives an information block of object references. A writer of the centrally managing object references system writes the information blocks into memory. A reader further reads previously written information blocks to inform plural applications of what objects were previously referenced.

Abstract: A pipelined analog-to-digital converter (ADC) is calibrated to enable production of an n-bit digital output representing an n-2 bit binary word, where “n” is a selected large positive integer, for example without limitation on the order of ten (10). In an analog-to-digital converter (ADC) having a plurality stages, each stage includes a stage input connection, a stage output connection, and a capacitor circuit including first and second predetermined capacitors (C1 and C2) and a variable capacitance calibration capacitor (Ccal). The first and second capacitors and the variable capacitance calibration capacitor are connected to each other at a capacitor common node. An amplifier input connection is connected to a capacitor common node. A comparator input connection (CIC) is connected to a stage input connection. A track and hold circuit (THC) is coupled to an amplifier output connection, and a source follower circuit (SF) is connected to a stage output connection.

Abstract: A cassette chemical immobilization and treatment method enables the performance of various complex chemistries with minimal human intervention, near-zero dead volume, and flow-through protocols pursuant to a predetermined instruction set encoded on a multiple-address chemical treatment cassette assembly. The cassette assembly comprises a plurality of analyte sample columns ("mini-columns"), having a high-pressure interface capability to permit direct insertion of the mini-column into a high-pressure solvent line for use as a support column for HPLC analysis. A sample loader loads analyte samples either singly or simultaneously into the multiple, addressable mini-columns without the need to load the sample funnel/column assembly into a separate reaction chamber.

Abstract: Apparatus, methods, systems and computer program products are disclosed that provide an efficient mechanism for invoking a programmed operation at the first active use of the OOP object or data structure. The programmed operation can be used to initialize an object-oriented programming (OOP) object or data structure. The first active use of the data structure or OOP object is detected because the initial access mechanism is constrained to cause a misaligned memory access fault (trap) by attempting a non-byte access-mode memory access to an odd byte address. As the fault is processed, the access mechanism is converted so that the initial and subsequent non-byte access-mode memory accesses will succeed. In addition, the OOP object or data structure is initialized. Then the initial access attempt is repeated on the just initialized OOP object or data structure using the converted access mechanism.

Abstract: A software patch method and apparatus using a content addressable memory (CAM) to produce a code change enable signal when a program memory address matches a patch memory address, to cause program execution of modem operation to be diverted to the patch code when an address comparison hit is achieved. The patching apparatus includes a program memory for applying program instructions onto a data bus for execution, unless an address comparison of a program address and a patch address causes application of a substitute address onto the data bus.

Abstract: A modem interface communicates data between a computer and a modem that is coupled to an external communication network. The modem interface includes a host interface for coupling to a host processor of the computer, an analog interface for coupling to the modem, and a digital signal processor for processing the data communicated with the modem and the host processor. A memory is coupled to the host interface, the digital signal processor and the analog interface. The analog interface provides clock signals and converts data between analog and digital for communicating between the memory and the modem. The analog interface provides an interrupt to the digital signal processor to control the transfer of data from the digital signal processor and the memory. The modem interface processes data at sampling rates while the host processor processes data at rates less than the sampling rate of the analog interface.

Abstract: A modem interface unit is provided for coupling a communications modem to a host processor. The modem interface unit includes a host interface for coupling to a host processor, an anlog interface for coupling to a communications modem and a digital signal processor for performing signal processing operations on modem signals as they are transferred from the host interface to the analog interface and vice versa. A memory is provided for use in moving the modem signals through the interface unit. A sleep mode mechanism is provided for discontinuing the supplying of operating current to the digital signal processor when no modem signals have been transmitted or received for a predetermined period of time.

Abstract: Methods, apparatus, and computer program products for linking stack messages to information relevant to stack entries and for generating the stack messages by adding link information to the stack messages. The stack messages are displayed to the user without the link information. Portions of the visible stack messages pertaining to the link information are highlighted, and upon selection by the user of the highlighted portion of the stack message, information relevant to the highlighted stack message is automatically displayed, for example, by running an editor, loading the source file corresponding to the message, and displaying the relevant portion of a source file.

Abstract: Methods, apparatus, and computer program products for linking stack messages to information relevant to stack entries and for generating the stack messages by adding link information to the stack messages. The stack messages are displayed to the user without the link information. Portions of the visible stack messages pertaining to the link information are highlighted, and upon selection by the user of the highlighted portion of the stack message, information relevant to the highlighted stack message is automatically displayed, for example, by running an editor, loading the source file corresponding to the message, and displaying the relevant portion of a source file.

Abstract: A method and system for secure encryption of information using a computer, including generating a key of a selected size, creating a virtual drive on a memory card, using the key generated to encrypt selected information, saving the key generated to a selected memory, creating a pointer that will read the virtual drive at the location on the memory card at which the key begins, physically removing the memory card from the encrypted information, and remotely securing the memory card.

Abstract: A modem interface communicates data between a computer and a modem that is coupled to an external communication network. The modem interface includes a host interface for coupling to a host processor of the computer, an analog interface for coupling to the modem, and a digital signal processor for processing the data communicated with the modem and the host processor. A memory is coupled to the host interface, the digital signal processor and the analog interface. The analog interface provides clock signals and converts data between analog and digital for communicating between the memory and the modem. The analog interface provides an interrupt to the digital signal processor to control the transfer of data from the digital signal processor and the memory. The modem interface processes data at sampling rates while the host processor processes data at rates less than the sampling rate of the analog interface.

Abstract: A method and apparatus for coupling an External Device to a Host Computer, such that program code to be executed by the external device may be stored in the Host Computer memory and yet be essentially independent of the Host Computer. Hardware and software enable the logical displacement of a program and address bus across inter-processor interfaces. An External Device preferably provides direct access to program code stored within Host Computer memory by means of a conventional DMA function. Program code which is to be executed by the External Processor within the External Device is transferred from the Host Memory to an Instruction Buffer memory within the External Device. The External Processor determines when to request additional instructions from the Host Memory over the DMA channel on a timed interrupt basis.

Abstract: A static, low-power differential sense amplifier (DSA) and method includes operation of cross-linked channels having complementary differential nodes separated from ground by corresponding parallel-transistor pairs. The DSA output channels have complementary output nodes separated from ground by corresponding parallel-transistor pairs. The DSA further includes logic gates to produce a sense amplifier output. Each logic gate is driven by a corresponding complementary differential node and an opposite complimentary output node. The DSA includes transistors activating a done line under control of the complementary differential nodes.

Abstract: A Viterbi decoder generates a branch metric table from first and second data signals taken at two sample times and provides selected branch metrics to an add/compare/select circuit in response to branch indices from a branch index generator. The branch metrics in the branch metric table are the sixteen combinations of the sum of the first and second parallel data signals at first and second sample times and the inverse of such signals. The branch index generator generates the branch indices in response to a received state from the add/compare/select circuit, convolutional code polynomials and the possible states of a radix-4 trellis. The add/compare/select generates a survivor path decision based on the selected branch metrics.

Abstract: A digital phase detector and charge pump circuit system reset circuit and method resets a digital phase detector according to the charge outputs between the charge pump circuits and a following loop filter. The sensing circuitry emulates portions of the circuitry of the digital phase detector and charge pump circuit system and minimizes deadband time. Current mirror portions of the charge pump circuit alternate between p-channel and n-channel devices to regularize output voltage levels produced by the charge pump circuit system.

Abstract: Modem technology is implemented in a system including a personal computer (PC) to enable communication over a PSTN using communication software which includes a DC and near-DC signal suppresser.

Abstract: A computer system comprises a plurality of user computers interconnected through a public-switched telephone network and trunk lines, and also includes a plurality of Remote Data Processing Nodes (RDPNs) similarly connected to each other and to the user computers. A BBS station which is also coupled to the network receives test data from the user computers. Each user computer includes a test unit that includes a digital signal processor and an active control unit. The test unit has a dialing directory for connecting to various BBSs to test out the communication through a modem and the telephone network. Using the dialing directory, the test unit activates the modem to make a predetermined call through the telephone network to several of the RDPNs. The test unit collects survey, snapshot and real-time data packets in a predetermined data file which are communicated to the BBS station for debugging the system and determining the performance of the system.

Abstract: A clock frequency multiplier with a rise detector flip-flop connected to a series of buffers having interspersed parallel output taps connected to a binary to Gray converter for providing real time rise status indications. The parallel tap outputs are connected to first, second and third multiplexers, to produce first and second fall outputs and a second rise output. The multiplexers are controlled by first, second and third corresponding tap circuits having hexadecimal inputs from a Gray to hexadecimal converter connected to the output of the binary to Gray converter through a flip-flop clocked by a second rise of the input clock signal.

Abstract: Modem technology is implemented in a system including a personal computer (PC) to enable communication over a PSTN using communication software which includes a mapping algorithm for mapping data into u-law signal points, which are divided into segments with different distances.

Abstract: An apparatus and method are available for detecting the presence of inert gas in an enclosure isolating one side of selected weld structures being joined during welding operation. The system and method include using an inert gas detector relying upon an electric filament positioned in a separate containment connected to the first containment in order to determined whether the required purity level of inert gas has been achieved in the weld enclosure.