Patents Represented by Attorney Robert Seed and Berry Iannucci
  • Patent number: 5521439
    Abstract: A combination of an electronic semiconductor device comprising a metal plate and a plastics body which encapsulates the metal plate leaving at least a major surface thereof exposed, a heat sink, and means of fastening the heat sink to the device. To enable securement of the heat sink on the device without any external fastening arrangement having to be used, and without unduly straining the solder spot of the device pins to a printed circuit, the device is provided with undercut regions on opposite sides adjacent to the exposed surface of the plate for releasable engagement by the fastening means.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: May 28, 1996
    Assignee: SGS-Microelectronics S.r.l.
    Inventors: Paolo Casati, Giuseppe Marchisi
  • Patent number: 5467358
    Abstract: A process for checking, reading or writing memories of a programmed computer. The process selects a pre-selected logic space in a memory to be checked. The process triggers the addressing micro-instructions of a suitable micro-program related to a pre-selected checking procedure, so as to cause its execution by means of a pre-established number of clock strokes. The micro-instructions of the micro-program are executed according to an incremental sequence and repeated in a loop.
    Type: Grant
    Filed: September 10, 1992
    Date of Patent: November 14, 1995
    Assignee: SGS-Thomson Microelectronics, s.r.l.
    Inventor: Flavio Scarra
  • Patent number: 5453678
    Abstract: A regulator including a power element between the input terminal and output terminal; and a regulating loop including a differential stage for comparing the output voltage of the regulator with a reference voltage and accordingly driving a gain stage connected to the power element. The output voltage is picked up by the differential stage via a resistive divider, the resistance of which varies according to the value of a logic signal at a control input. When the resistance of the divider changes, the inputs of the differential stage are so unbalanced as to produce an output voltage up or down ramp equal to the slew rate of the regulating loop and proportional to the bias current of the differential stage. Over the up ramp, the shorting protection circuit is turned off for a predetermined time .tau., whereas, over the down ramp, a stage is turned on for absorbing the discharge current of the capacitive load.
    Type: Grant
    Filed: June 24, 1993
    Date of Patent: September 26, 1995
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Luca Bertolini, Roberto Gariboldi