Abstract: A servo address is encoded in a disk drive system having at least one disk for storing data. A servo address associated with a sector in a track, or cylinder, on a surface of a disk and comprised of a sector number, a track number, and in multiple disk systems, a head number is encoded into the encoded servo address. Encoding the servo address saves disk storage space because the encoded servo address uses fewer bits than a conventional servo address while still enabling the disk drive system to locate positions on the disk.
Type:
Grant
Filed:
December 27, 1994
Date of Patent:
January 21, 1997
Assignee:
International Business Machines Corporation
Abstract: The invention provides a machine fault diagnostic system to help ensure effective equipment maintenance. The major technique used for fault diagnostics is a fault diagnostic network (FDN) which is based on a modified ARTMAP neural network architecture. A hypothesis and test procedure based on fuzzy logic and physical bearing models is disclosed to operate with the FDN for detecting faults that cannot be recognized by the FDN and for analyzing complex machine conditions. The procedure described herein is able to provide accurate fault diagnosis for both one and multiple-fault conditions. Furthermore, a transputer-based parallel processing technique is used in which the FDN is implemented on a network of four T800-25 transputers.
Type:
Grant
Filed:
December 30, 1993
Date of Patent:
October 15, 1996
Assignee:
Caterpillar Inc.
Inventors:
Hsu-Pin Wang, Hsin-Hao Huang, Gerald M. Knapp, Chang-Ching Lin, Shui-Shun Lin, Julie K. Spoerre
Abstract: A method is provided to remove redundancies in multi-level logic networks caused by reconverging signals at Boolean sum and product nodes. Generally, sum and product nodes which have potential redundancies are first identified. For each reconvergent signal at each of the nodes, it is determined whether it introduces redundancies using nondestructive Boolean analysis. No two-level expansion is made of the logic network. Moreover, for each confirmed redundancy, a redundant term is identified using Boolean analysis. Finally, the redundancy is removed, if desirable.
Type:
Grant
Filed:
June 28, 1991
Date of Patent:
June 4, 1996
Assignee:
International Business Machines Corporation
Inventors:
Paul W. Horstmann, Thomas E. Rosser, Prashant S. Sawkar