Abstract: The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. In particular, this invention provides a melt-recrystallization ATR method, for use alone or in combination with non-melt-recrystallization ATR methods, in which selected Si regions bounded by dielectric-filled trenches are induced to undergo an orientation change by the steps of preamorphization, laser-induced melting, and corner-defect-free templated recrystallization from the melt.

Abstract: A method of forming extruded structures from a polycrystalline material and structures formed thereby. The method generally entails forming a structure that comprises a polycrystalline material constrained by a second material in all but one direction, with the polycrystalline material having a patterned surface that is normal to the one direction. The polycrystalline material is then selectively heated, during which the second material restricts thermal expansion of the polycrystalline material in all but the one direction normal to the surface of the polycrystalline material. As a result, stresses are induced in the polycrystalline material that cause grain growth from the surface of the polycrystalline material in the one direction. The growth of an individual grain produces an extruded structure that projects above the surface of the polycrystalline material.

Abstract: A method and structure for a photodiode array comprising a plurality of photodiode cores, light sensing sidewalls along an exterior of the cores, logic circuitry above the cores, trenches separating the cores, and a transparent material in the trenches is disclosed. With the invention, the sidewalls are perpendicular to the surface of the photodiode that receives incident light. The light sensing sidewalls comprise a junction region that causes electron transfer when struck with light. The sidewalls comprise four vertical sidewalls around each island core. The logic circuitry blocks light from the core so light is primarily only sensed by the sidewalls.

Abstract: Disclosed is a multilayer integrated circuit structure joined to a chip carrier, and a process of making, in which the area normally occupied by a solid dielectric material in the IC is at least partially hollow. The hollow area can be filled with a gas, such as air, or placed under vacuum, minimizing the dielectric constant. Several embodiments and processing variants are disclosed. In one embodiment of the invention, the wiring layers, which are embedded in a temporary dielectric, alternate with via layers, also embedded in a temporary dielectric, in which the vias, besides establishing electrical communication between the wiring layers, also provide mechanical support for after the temporary dielectric is removed. Additional support is optionally provided by support structures though the interior levels and at the periphery of the chip. The temporary dielectric is removed subsequent to joining by dissolution or by ashing in an oxygen-containing plasma.

Abstract: Grooves are formed in a COD pad by positioning the pad on a supporting surface with a working surface of the pad in spaced relation opposite to a router bit and at least one projecting stop member adjacent to the router bit, an outer end portion of the bit projecting beyond the stop. When the bit is rotated, relative axial movement between the bit and the pad causes the outer end portion of the bit to cut an initial recess in the pad. Relative lateral movement between the rotating bit and the pad then forms a groove which extends laterally away from the recess and has a depth substantially the same as that of the recess. The depths of the initial recess and the groove are limited by applying a vacuum to the working surface of the pad to keep it in contact with the stop member(s). Different lateral movements between the bit and the pad are used to form a variety of groove patterns, the depths of which are precisely controlled by the stop member(s).

Abstract: An amorphous fluorinated carbon film for use as a dielectric insulating layer in electrical devices is formed from a fluorinated cyclic hydrocarbon precursor. The precursor may be selected from the group consisting of hexafluorobenzene, 1,2-diethynyltetrafluorobenzene and 1,4-bis(trifluoromethyl) benzene. The film is deposited by a radiation or beam assisted deposition technique such as an ion beam assisted deposition method, a laser assisted deposition method, or a plasma assisted chemical vapor deposition method. The film is thermally stable in non-oxidizing environment at temperatures up to 400° C. and has a low dielectric constant of less than 3.0. The film can be suitably used as an insulator for spacing apart conductors in an interconnect structure.

Abstract: A method for forming a quaternary alloy film of Co—W—P—Au for use as a diffusion barrier layer on a copper interconnect in a semiconductor structure and devices formed incorporating such film are disclosed. In the method, a substrate that has copper conductive regions on top is first pre-treated by two separate pre-treatment steps. In the first step, the substrate is immersed in a H2SO4 rinsing solution and next in a solution containing palladium ions for a length of time sufficient for the ions to deposit on the surface of the copper conductive regions. The substrate is then immersed in a solution that contains at least 15 gr/l sodium citrate or EDTA for removing excess palladium ions from the surface of the copper conductive regions.

Abstract: A low dielectric constant, multiphase material which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a multiphase low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of the multiphase low dielectric constant materials that are prepared by the method are further disclosed.

Abstract: The present invention discloses an interconnection structure for providing electrical communication with an electronic device which includes a body that is formed substantially of copper and a seed layer of either a copper alloy or a metal that does not contain copper sandwiched between the copper conductor body and the electronic device for improving the electromigration resistance, the adhesion property and other surface properties of the interconnection structure. The present invention also discloses, methods for forming an interconnection structure for providing electrical connections to an electronic device by first depositing a seed layer of copper alloy or other metal that does not contain copper on an electronic device, and then forming a copper conductor body on the seed layer intimately bonding to the layer such that electromigration resistance, adhesion and other surface properties of the interconnection structure are improved.

Abstract: A method for forming solder bumps on an electronic structure including the steps of first providing a mold made by a sheet of a mold material having a thickness greater than that of the solder bumps to be formed, the mold material has sufficient optical transparency so as to allow the inspection of a solder material subsequently filled into the mold cavities that are formed in the mold material, and a coefficient of thermal expansion that is substantially similar to the substrate which the mold will be mated to, forming a multiplicity of mold cavities in the sheet of mold material, filling the multiplicity of mold cavities with a solder material, cooling the mold to a temperature that is sufficient to solidify the solder material in the multiplicity of mold cavities, positioning the mold intimately with the electronic structure such that the cavities facing the structure, and heating the mold and the structure together to a temperature sufficiently high such that the solder material transfers onto the electro

Abstract: A low dielectric constant, thermally stable hydrogenated oxidized silicon carbon film which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a thermally stable hydrogenated oxidized silicon carbon low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of thermally stable hydrogenated oxidized silicon carbon low dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of thermally stable hydrogenated oxidized silicon carbon low dielectric constant film, specific precursor materials having a ring structure are preferred.

Abstract: A method for forming solder bumps on an electronic structure including the steps of first providing a mold made by a sheet of a mold material having a thickness greater than that of the solder bumps to be formed, the mold material has sufficient optical transparency so as to allow the inspection of a solder material subsequently filled into the mold cavities that are formed in the mold material, and a coefficient of thermal expansion that is substantially similar to the substrate which the mold will be mated to, forming a multiplicity of mold cavities in the sheet of mold material, filling the multiplicity of mold cavities with a solder material, cooling the mold to a temperature that is sufficient to solidify the solder material in the multiplicity of mold cavities, positioning the mold intimately with the electronic structure such that the cavities facing the structure, and heating the mold and the structure together to a temperature sufficiently high such that the solder material transfers onto the electro

Abstract: An electronic device that is equipped with a plurality of bonding pads positioned on the device for making electrical interconnections and electrically conductive composite bumps adhered to the bonding pads wherein the bumps are formed of a composite material consisting of a thermoplastic polymer and at least about 30 volume percent of conductive metal particles based on the total volume of the metal particles and the thermoplastic polymer. The present invention is also directed to a method of making electrical interconnections to an electronic device by pressing a plurality of composite bumps of a polymeric based material against a substrate having an electrically conductive surface by mechanical means under a sufficient temperature and/or a sufficient pressure.

Abstract: A rapid thermal processing apparatus and a method of using such apparatus for the continuous heat treatment of at least one workpiece, which apparatus includes a cavity of generally elongated shape, a process chamber defined by interior walls inside the cavity, a device for delivering, regulating and extracting process gases from the chamber, a device for transporting at least one workpiece through the chamber in a substantially forward direction, a device for heating at least a section of the chamber, and a device for cooling the at least one workpiece downstream from the heating device. The cavity for the apparatus may also be provided in either a curved or a linear configuration for carrying out the present invention method.

Abstract: A method of making Copper alloys containing between 0.01 and 10 weight percent of at least one alloying element selected from carbon, indium and tin is disclosed for improved electromigration resistance, low resistivity and good corrosion resistance that can be used in chip and package interconnections and conductors by first forming the copper alloy and then annealing it to cause the diffusion of the alloying element toward the grain boundaries between the grains in the alloy are disclosed.