Patents Represented by Attorney, Agent or Law Firm Robert W. Morris
  • Patent number: 6192687
    Abstract: Uninterruptible power supplies are provided that utilize a material to provide a source of thermal energy that may be converted to electrical energy to produce backup electrical power for a load. In some embodiments, a hot tank assembly is utilized to hold a liquid heated to a predetermined temperature. A closed-loop pipe containing, water for example, is immersed in the heated liquid. Upon the loss of primary power, the water flows into the heat exchanger where it is raised above its boiling temperature. The steam is then passed to a heat engine (e.g., a turbine-based system) that converts the heated steam to mechanical energy by causing the heat engine rotor to rotate. A generator is physically coupled to the heat engine so that the rotation of the heat engine rotor drives the generator. The generator produces AC power which is converted to DC and again back to AC before being provided to the load. In other embodiments, a solid mass, such as a block of iron, is heated to a predetermined temperature.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: February 27, 2001
    Assignee: Active Power, Inc.
    Inventors: Joseph F. Pinkerton, David B. Clifton
  • Patent number: 6188269
    Abstract: The circuits and methods of the present invention provide rail-to-rail output stages that cancel the non-linear components of the transconductances of transistors used in the output stages, that allow the idling current in the output stages to be controlled by external current sources and device size ratios, and that enable the idling current in the output stages to be maintained independently of manufacturing processes, temperature, and power supply voltages. The output stages generally comprise a complementary subcircuit, a current mirror and an output driver. The output stages receive an input signal and a bias voltage from an external source and responsively produce a push current that feeds current into a load and a pull current that pulls current from the load. When the push current matches the pull current, the output stages are said to be “idling.” The bias voltage controls the idling current.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: February 13, 2001
    Assignee: Linear Technology Corporation
    Inventor: Max Wolff Hauser
  • Patent number: 6169506
    Abstract: An oversampling data converter with good rejection capability is provided. The oversampling data converter includes three primary parts; a delta-sigma modulator for sampling and digitizing incoming analog signals, a high order digital filter for discarding unwanted frequency components, and an internal clock generator for controlling the operation of the modulator and the filter. All three primary parts are provided in the same package and also on the same die. No frequency-setting external components are necessary. The high order digital filter provides more than 100 dB rejection at a first null frequency. The first null provided by the filter has a sufficiently broad range so as to allow a low accuracy internal clock generator to be used. If necessary, the clock can be generated externally or from some other part of the system.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: January 2, 2001
    Assignee: Linear Technology Corp.
    Inventors: Florin A. Oprescu, William C. Rempfer
  • Patent number: 5384499
    Abstract: A programmable logic device is presented comprising a global interconnect array whose lines are fed via programmable multiplexers to logic array blocks. The global interconnect array lines are fed to the multiplexers in a specific pattern which maximizes the user's ability to route a selected line to the output of a selected multiplexer, while at the same time maintaining higher speed and lower power consumption, and using less chip array than prior art programmable logic devices using programmable interconnect arrays based on erasable programmable read-only memories.
    Type: Grant
    Filed: September 17, 1993
    Date of Patent: January 24, 1995
    Assignee: Altera Corporation
    Inventors: Bruce B. Pedersen, David Chiang, Francis B. Heile, Cameron McClintock, Hock-Chuen So, James A. Watson
  • Patent number: 5365118
    Abstract: A driver circuit for driving top and bottom power transistors stacked between two supply terminals is provided. The driver circuit includes shoot-through reduction means for monitoring the gate-to-source voltages of the two power transistors so as to inhibit the turning-ON of each power transistor until the gate-to-source voltage of the other power transistor has fallen to a voltage level indicative of the other transistor being OFF. Additionally, the driver circuit which can utilize a bootstrap capacitor for providing enhanced voltages to drive the top power transistor, also includes a bootstrap capacitor recharge means to monitor the output voltage of the circuit so as to inhibit the turning-ON of the top power transistor until the bootstrap capacitor has had sufficient time to recharge.
    Type: Grant
    Filed: June 4, 1992
    Date of Patent: November 15, 1994
    Assignee: Linear Technology Corp.
    Inventor: Milton E. Wilcox
  • Patent number: 5353248
    Abstract: A first-in, first-out (FIFO) static random access memory (SRAM) device includes EEPROM cells which provide non-volatile backup capability. The sizing of each SRAM cell is such that its associated EEPROM cell is automatically programmed via the output of the SRAM cell. Upon power-up, the EEPROM cell restores the SRAM cell to the inverse of whatever state it was in prior to the most recent EEPROM programming (before a preceding power-down). This provides non-volatility to the SRAM without a significant increase in manufacturing costs or overhead.
    Type: Grant
    Filed: April 14, 1992
    Date of Patent: October 4, 1994
    Assignee: Altera Corporation
    Inventor: Anil Gupta
  • Patent number: 5334928
    Abstract: A three terminal control circuit for a low dropout voltage regulator having a PNP pass transistor is provided. The control circuit is capable of pulling the base drive point down to a voltage of 3.0 volts or less to permit a current limiting resistor to be inserted between the base drive point and the base of the PNP pass transistor. The control circuit includes a pair of small-valued capacitors for providing stable operation with different output capacitors. The control circuit can also be used with p-channel FET pass transistors.
    Type: Grant
    Filed: July 27, 1993
    Date of Patent: August 2, 1994
    Assignee: Linear Technology Corporation
    Inventors: Robert C. Dobkin, Carl T. Nelson, Dennis P. O'Neill
  • Patent number: 5327095
    Abstract: A method and circuit for increasing the output impedance of an inactive amplifier is provided. The method and circuit allows an increased number of amplifiers to be coupled in parallel to a single transmission line for distributing a plurality of video or other electrical signals to a remote location. The method and circuit increasing the impedance of an amplifier feedback network during inactive operation using a bootstrapping technique (i.e., by driving the feedback network) so as to increase the overall impedance of the amplifier during such operation.
    Type: Grant
    Filed: February 19, 1993
    Date of Patent: July 5, 1994
    Assignee: Linear Technology Corporation
    Inventors: William H. Gross, John W. Wright
  • Patent number: 5317125
    Abstract: Methods and apparatus for monitoring the temperature of a workpiece during fusing operations are provided. The apparatus includes a temperature sensor which monitors the temperature of a commutator bar being fused and outputs an electrical signal corresponding to that temperature. The electric current supplied to the fusing electrode can be interrupted or modified if the temperature of the commutator bar exceeds a predetermined temperature. In this manner, fusing operations can be interrupted if the temperature of the commutator bar approaches a temperature at which other components of the workpiece, such as the core material will be adversely affected. The temperature sensor preferably contacts the workpiece to conduct heat to a sensing element.
    Type: Grant
    Filed: February 22, 1993
    Date of Patent: May 31, 1994
    Assignee: Axis U.S.A., Inc.
    Inventor: Alessandro Rossi
  • Patent number: 5305192
    Abstract: Control circuits for a switching voltage regulator circuit which uses magnetic flux sensing are provided. These circuits can be used to improve output voltage regulation by reducing parasitic effects inherently present in magnetic flux-sensed feedback switching voltage regulator designs.
    Type: Grant
    Filed: November 1, 1991
    Date of Patent: April 19, 1994
    Assignee: Linear Technology Corporation
    Inventors: Anthony K. Bonte, Carl T. Nelson
  • Patent number: 5300753
    Abstract: Methods and apparatus for fusing together electrical conductors to a commutator are provided. A precise, timed, and controlled delivery of electric current to the fusing electrode of the fusing machine is achieved. A generic supply signal is converted into a precise and constant input signal through the use of monitoring and feedback techniques, which compare the current status of the physical and electrical phases of the fusing operation to various predetermined fusing profiles to determine the proper application of current to the fusing electrode.
    Type: Grant
    Filed: June 25, 1992
    Date of Patent: April 5, 1994
    Assignee: Axis USA, Incorporated
    Inventor: Alessandro Rossi
  • Patent number: 5296406
    Abstract: A Schottky diode is presented which has reduced minority carrier injection and reduced diffusion of the metallization into the semiconductor. These improvements are obtained by interposing a layer comprising a mixture of silicon and chromium between the anode metallization layer and the semiconductor in a Schottky diode. The layer including chromium acts an effective barrier against the diffusion of the metallization layer into the semiconductor, and at the same time reduces the amount of minority carrier injection into the substrate. The layer including chromium requires no addition photolithograpic masks because it can be plasma etched using the metallization layer as a mask after that layer has been patterned.
    Type: Grant
    Filed: July 7, 1993
    Date of Patent: March 22, 1994
    Assignee: Linear Technology Corporation
    Inventors: John E. Readdie, Benjamin H. Kwan, Jeng Chang
  • Patent number: 5274323
    Abstract: A three terminal control circuit for a low dropout voltage regulator having a PNP pass transistor is provided. The control circuit is capable of pulling the base drive point down to a voltage of 3.0 volts or less to permit a current limiting resistor to be inserted between the base drive point and the base of the PNP pass transistor. The control circuit includes a pair of small-valued capacitors for providing stable operation with different output capacitors. The control circuit can also be used with p-channel FET pass transistors.
    Type: Grant
    Filed: October 31, 1991
    Date of Patent: December 28, 1993
    Assignee: Linear Technology Corporation
    Inventors: Robert C. Dobkin, Carl T. Nelson, Dennis P. O'Neill
  • Patent number: 5272368
    Abstract: A non-volatile CMOS electrically erasable programmable memory cell for configuring a PLD is disclosed. A CMOS inverter is formed by fabricating an n-channel MOSFET and a p-channel MOSFET with merged floating gate regions. A tunnel capacitor allows charge to be supplied to or removed from the floating gate. The floating gate provides non-volatile charge storage. The CMOS inverter senses the presence or absence of charge on the floating gate and provides an amplified inverted output. The CMOS inverter consumes very low power and provides rail-to-rail output voltage swings.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: December 21, 1993
    Assignee: Altera Corporation
    Inventors: John E. Turner, Richard G. Cliff
  • Patent number: 5268598
    Abstract: A programmable logic device is presented comprising a global interconnect array whose lines are fed via programmable multiplexers to logic array blocks. The global interconnect array lines are fed to the multiplexers in a specific pattern which maximizes the user's ability to route a selected line to the output of a selected multiplexer, while at the same time maintaining higher speed and lower power consumption, and using less chip array than prior art programmable logic devices using programmable interconnect arrays based on erasable programmable read-only memories.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: December 7, 1993
    Assignee: Altera Corporation
    Inventors: Bruce B. Pedersen, David Chiang, Francis B. Heile, Cameron McClintock, Hock-Chuen So, James A. Watson
  • Patent number: 5258662
    Abstract: A power efficient circuit for charging the gate of a transistor switch to a charge-pumped voltage level in excess of a supply rail voltage is provided. The circuit includes a current-controlled oscillator which generates an oscillating waveform that drives a capacitive charge-pump circuit. The circuit monitors the gate voltage of the transistor switch and reduces the frequency of the oscillating waveform, thereby reducing power consumption, when the gate voltage exceeds a frequency switching value indicating that the transistor switch has been sufficiently turned so as to allow the circuit to enter a micropower mode.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: November 2, 1993
    Assignee: Linear Technology Corp.
    Inventor: Timothy J. Skovmand
  • Patent number: 5257309
    Abstract: Dual tone multifrequency ("DTMF") signal pulses are detected and identified by subjecting the signal being analyzed to complex bandpass filtering for each of the two DTMF frequency bands. The envelope of the outputs of each of these filters are determined and subjected to a succession of different tests including a ripple or smoothness test to ensure adequate smoothness, a ratio test to ensure the occurrence of a step function, a twist test to ensure the proper amplitude ratio between the two bands, and a minimum energy test to ensure that the signal has sufficient energy. If the signal passes all of the detection tests, then the actual DTMF signal is identified by using the real and imaginary parts of each complex bandpass filter output to compute an associated complex phase angle, and comparing that phase angle to the corresponding phase angles for valid DTMF tones.
    Type: Grant
    Filed: December 11, 1990
    Date of Patent: October 26, 1993
    Assignee: Octel Communications Corporation
    Inventors: Yigal Brandman, Manoj Puri
  • Patent number: 5256977
    Abstract: A high frequency surge tester includes a high frequency detection circuit which is used to detect microfracture defects in the insulation of wire on wound coils. The high frequency detection circuit includes a high-pass filter which isolates an errant voltage response so that it can be integrated and compared to threshold limits to determine the magnitude of defects. The surge tester also detects shorts between coils and shorts between turns of the same coil.
    Type: Grant
    Filed: November 22, 1991
    Date of Patent: October 26, 1993
    Assignee: Axis USA, Inc.
    Inventors: Carlo Domenichini, Massimo Linari
  • Patent number: 5254869
    Abstract: A Schottky diode is presented which has reduced minority carrier injection and reduced diffusion of the metallization into the semiconductor. These improvements are obtained by interposing a layer comprising a mixture of silicon and chromium between the anode metallization layer and the semiconductor in a Schottky diode. The layer including chromium acts an effective barrier against the diffusion of the metallization layer into the semiconductor, and at the same time reduces the amount of minority carrier injection into the substrate. The layer including chromium requires no addition photolithograpic masks because it can be plasma etched using the metallization layer as a mask after that layer has been patterned.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: October 19, 1993
    Assignee: Linear Technology Corporation
    Inventors: John E. Readdie, Benjamin H. Kwan, Jeng Chang
  • Patent number: 5251678
    Abstract: In a device for forming coils for windings for dynamo-electric machines, the means for preventing rotation of the form on which the coil is wound comprise a member which supports the form and is mounted on the shaft of the device so as to be freely rotatable relative to the shaft and to the winding head about separate axes.
    Type: Grant
    Filed: January 13, 1992
    Date of Patent: October 12, 1993
    Assignee: Axis S.p.A.
    Inventor: Roberto Orecchia