Patents Represented by Attorney, Agent or Law Firm Roberts W. Morris
  • Patent number: 6836105
    Abstract: Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the CMC and the IFMC can accurately measure low power signals. The CMC may also set the minimum noise bandwidth associated with gain stages in the IFMC. The intermediate frequency may provide the IFMC with the ability to perform low power measurements at a reduced DC power consumption.
    Type: Grant
    Filed: February 15, 2003
    Date of Patent: December 28, 2004
    Assignee: Linear Technology Corporation
    Inventor: Min Z. Zou
  • Patent number: 6797549
    Abstract: A high voltage MOS transistor with a gate extension that has a reduced electric field in the drain region near the gate is provided. The high voltage MOS transistor includes a first and second gate layers, and a dielectric layer between the gate layers. The first and second gate layers are electrically coupled together and form the gate of the transistor. The second gate layer extends over the drain of the transistor above the dielectric and gate oxide layers to form the gate extension. The gate extension reduces the peak electric field in the drain by providing a wide area for the voltage to drop between the drain and the gate of the transistor. The dielectric layer also reduces the peak electric field in the drain near the gate by providing insulation between the gate and the drain. A lower electric field in the drain reduces the impact generation rate of carriers.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: September 28, 2004
    Assignee: Linear Technology Corporation
    Inventor: Francois Hebert
  • Patent number: 6777823
    Abstract: A continuous power system assembly is provided that includes an integrated shaft-driven unit. The unit contains a turbine, an alternator, a flywheel and a feed pump, all of which are coupled to the shaft. During various modes of operation, any of the turbine, alternator or flywheel may provide the torque used to drive the shaft. When the alternator is not providing the necessary torque to drive the shaft, it is operated as a generator that provides back-up power to a load. The present invention also includes a unique nozzle design that improves the ease with the nozzles may be manufactured in comparison to known designs. The nozzle is manufactured as two halves which are mated as part of the manufacturing process. The individual nozzles may, because only half of the nozzle segments exist on either half of the nozzle block, be easily manufactured using conventional machining.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: August 17, 2004
    Assignee: Active Power, Inc.
    Inventors: Gail Roberts, Philip Keene, David Lowe, James Hunt, Joseph F. Pinkerton, David B. Clifton
  • Patent number: 6768173
    Abstract: A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The implanted dopants diffuse into the epitaxial layer from the substrate during the formation of the epitaxial layer and subsequent heating steps. The implanted dopants increase the doping concentration in a lower portion of the epitaxial layer. The implanted dopants may diffuse father into the epitaxial layer than dopants in the buried layer forming an up-retro well that prevents vertical punch-through at high operating voltages for thin epitaxial layers. In addition, the doping concentration below the gate may be light so that the threshold voltage of the transistor is low.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: July 27, 2004
    Assignee: Linear Technology Corporation
    Inventor: Francois Hebert
  • Patent number: 6765279
    Abstract: General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor layer of the membrane. The semiconductor membrane layer is initially formed from a substrate of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as a support and electrical interconnect for conventional die bonded thereto. Multiple die can be connected to the membrane, which is then packaged as a multi-chip module. Other applications are based on membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D IC fabrication.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: July 20, 2004
    Assignee: Elm Technology Corporation
    Inventor: Glenn Joseph Leedy
  • Patent number: 6714625
    Abstract: General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor layer of the membrane. The semiconductor membrane layer is initially formed from a substrate of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as support and electrical interconnect for conventional integrated circuit die bonded thereto, with the interconnect formed in multiple layers in the membrane. Multiple die can be connected to one such membrane, which is then packaged as a multi-chip module. Other applications are based on (circuit) membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D IC fabrication.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 30, 2004
    Assignee: Elm Technology Corporation
    Inventor: Glenn Joseph Leedy
  • Patent number: 6712841
    Abstract: Methods and apparatus for treating hemorrhoids and similar ailments are disclosed in which one or more piece of material are used to separate swollen, inflamed tissue from non-swollen tissue, material may be included within an undergarment that may be worn for the treatment of ailments such as hemorrhoids or an episiotomy. The material incorporated into the undergarment has elastic properties that, in the case of hemorrhoids, acts to separate the buttocks. The undergarment may also include one or more pocket enclosures to hold cold compresses, ice packs, pain ointment, etc. directly upon, or in close proximity to, the affected area. Alternately, the material may be one or more single-use strips that include adhesive such that the strips act to separate the affected area from the non-affected area.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: March 30, 2004
    Assignee: Florez & Co.
    Inventor: Rebecca Gomez
  • Patent number: 6657320
    Abstract: Integrated flywheel uninteruptible power supply (UPS) systems provide reliable back-up power protection in a single integrated housing unit. The integration of the two normally independent systems results in a synergism such that various components may be shared between the systems. For example, the flywheel unit and the UPS electronics unit may utilize a single cooling system that is less complex and requires less energy to operate than two independent cooling systems. Other shared components may include at least control circuitry, user and display interface circuitry, fusing, DC bus capacitors, and emergency shut-off circuitry.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: December 2, 2003
    Assignee: Active Power, Inc.
    Inventors: James A. Andrews, David A. Badger, Robert L. Fuller, Randal A. Lee, David E. Perkins, James R. Pitt, Dave J. Wehrlen
  • Patent number: 6632706
    Abstract: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 &mgr;m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: October 14, 2003
    Assignee: Elm Technology Corporation
    Inventor: Glenn J. Leedy
  • Patent number: 6628165
    Abstract: The present invention provides radio frequency (RF) power controllers that regulate the power output signal of an RF power amplifier using a control signal. The RF power controller includes a power control amplifier that measures the difference between a feedback signal and a power control input signal to supply the control signal to the RF power amplifier. The output power signal is amplitude modulated for a period of time during an enable mode. During the amplitude modulation period, the RF power controller opens the power control loop and maintains a substantially constant output voltage to the RF power amplifier using a second amplifier and a capacitor coupled to power control amplifier. The capacitor is decoupled from the power control amplifier during the amplitude modulation period, and the second amplifier supplies the output voltage of the RF power controller based upon the stored voltage on the capacitor.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: September 30, 2003
    Assignee: Linear Technology Corporation
    Inventors: Edward L. Henderson, Samuel H. Nork
  • Patent number: 6612519
    Abstract: The present invention discloses methods and apparatus for winding wire onto the slots on armature lamination stacks. More specifically, the present invention is directed to methods and apparatus for increasing time the winding components are operating on an armature winding system. The invention includes a loading/unloading unit and a holding unit that may be operated independently under most circumstances. The independent operation enables the winders of the present invention to operate at increased duty cycles, thereby increasing throughput. Additionally, the apparatus of the present invention increases the likelihood that armatures remain properly indexed during the loading transfer process to further increase system efficiency.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: September 2, 2003
    Assignee: Axis USA, Inc.
    Inventors: Raffaele Becherucci, Gianfranco Stratico, Maurizio Mugelli, Giovanni Manuelli
  • Patent number: 6608402
    Abstract: Circuits and methods for controlling load sharing by multiple power supplies are provided. In preferred embodiments, load share controllers utilize multiple voltage control loops to monitor the output voltages that are being provided by multiple power supplies connected to a load. These voltage control loops each generate a voltage control voltage that is proportional to the difference between the actual output voltage of the corresponding power supply and the desired output voltage. The voltage control loop with the highest voltage control voltage then controls a current control voltage generated in a current control loop for each power supply via a share bus. These current control loops then regulate the current provided by the corresponding power supplies so that those currents are all proportional to the voltage on the share bus.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: August 19, 2003
    Assignee: Linear Technology Corporation
    Inventors: David Henry Soo, Robert Loren Reay
  • Patent number: 6563224
    Abstract: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 &mgr;m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density interlayer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: May 13, 2003
    Assignee: Elm Technology Corporation
    Inventor: Glenn J. Leedy
  • Patent number: 6528850
    Abstract: A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The implanted dopants diffuse into the epitaxial layer from the substrate during the formation of the epitaxial layer and subsequent heating steps. The implanted dopants increase the doping concentration in a lower portion of the epitaxial layer. The implanted dopants may diffuse father into the epitaxial layer than dopants in the buried layer forming an up-retro well that prevents vertical punch-through at high operating voltages for thin epitaxial layers. In addition, the doping concentration below the gate may be light so that the threshold voltage of the transistor is low.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: March 4, 2003
    Assignee: Linear Technology Corporation
    Inventor: Francois Hebert
  • Patent number: 6512305
    Abstract: An uninterruptible power supply (UPS) system supplies power to computers, medical apparatus or other critical loads when primary power supply falters. The UPS system includes an electrical machine connected to a turbine that can be rotated by a motive fluid from a fluid supply. The electrical machine can be a dual purpose electrical machine (a motor/generator) or a two unit machine (one motor and one generator in a single housing or in separate housings) connected to the turbine. When power is supplied from the primary power supply to the critical load, the electrical machine acts as a motor to rotate the turbine and energy is stored by the turbine rotor in the form of rotational momentum. When power from the primary power supply falters, the rotational momentum of the turbine rotor initially rotates the electrical machine which acts as a generator to provide power to the critical load.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: January 28, 2003
    Assignee: Active Power, Inc.
    Inventors: Joseph F. Pinkerton, David B. Clifton
  • Patent number: 6504351
    Abstract: The present invention provide systems and methods for reducing a reverse recovery current through a body diode in a synchronous switching transistor. An inductor is coupled in the commutation path of the body diode of the synchronous switching transistor. The inductor slows the rate of increase of the reverse recovery current to reduce avalanche effects in the synchronous switching transistor. This reduces the peak reverse recovery current through the body diode of the synchronous switching transistor when the body diode commutates, thereby reducing power dissipation in the main switching transistor. An inductor may be coupled to both switching transistors so that power dissipation is reduced if the regulator is operated as a buck or boost regulator. A diode and a reverse recovery switcher may be coupled to the inductor to transfer energy in the inductor back to the input or output capacitor after the body diode commutates.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: January 7, 2003
    Assignee: Linear Technology Corporation
    Inventors: Dale R. Eagar, John L. Seago
  • Patent number: 6495993
    Abstract: Recovery systems and methods of the present invention include circuitry that transfers energy from an input to an output with reduced power dissipation. A synchronous switching regulator is one application for the recovery system of the present invention. An inductor may be used in a synchronous switching regulator to reduce power dissipation caused by reverse recovery current that flows through the body diode of the synchronous switching transistor when the synchronous switching transistor turns OFF. Energy in the inductor may be transferred back to the input or output capacitor of the switching regulator through a recovery system of the present invention. The recovery circuit of the present invention provides an efficient method for intercepting energy in the inductor, and presenting power to a recovery switcher in a manner that allows the recovery switcher to transfer the energy into the input or output capacitor of the switching regulator efficiently.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: December 17, 2002
    Assignee: Linear Technology Corporation
    Inventor: Dale R. Eagar
  • Patent number: 6492678
    Abstract: A high voltage MOS transistor with a gate extension that has a reduced electric field in the drain region near the gate is provided. The high voltage MOS transistor includes a first and second gate layers, and a dielectric layer between the gate layers. The first and second gate layers are electrically coupled together and form the gate of the transistor. The second gate layer extends over the drain of the transistor above the dielectric and gate oxide layers to form the gate extension. The high voltage MOS transistor of the present invention may be fabricated without additional processing steps in BiCMOS and CMOS processes that use dual polysilicon layers and a dielectric layer that are used to form capacitors.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: December 10, 2002
    Assignee: Linear Technology Corporation
    Inventor: Francois Hebert
  • Patent number: 6463738
    Abstract: A continuous power system provides a continuous supply of power to a load in the event that primary power fails or is degraded. The continuous power system includes an electrical machine, a turbine and a flywheel coupled to a shaft. When utility power is present, the machine operates as a motor to drive the shaft. During outages, the electrical machine operates as a generator to provide power to the load. Kinetic energy stored in the flywheel drives the shaft during initial power interruptions. During further short-term interruptions, a thermal energy supply (or thermal storage device) is used to provide vaporized liquid to the turbine so that the turbine drives the shaft. If the power loss or failure is extended, the turbine is driven by vapor produced by an evaporator heated from an external fuel supply. Numerous methods and apparatus are also described for reducing system losses and improving overall performance.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: October 15, 2002
    Assignee: Active Power, Inc.
    Inventors: Joseph F. Pinkerton, David B. Clifton, Kenneth E. Nichols, Michael D. Forsha, James E. Dillard, William D. Batton
  • Patent number: 6465909
    Abstract: Circuits and methods for controlling load sharing by multiple power supplies are provided. In preferred embodiments, load share controllers utilize multiple voltage control loops to monitor the output voltages that are being provided by multiple power supplies connected to a load. These voltage control loops each generate a voltage control voltage that is proportional to the difference between the actual output voltage of the corresponding power supply and the desired output voltage. The voltage control loop with the highest voltage control voltage then controls a current control voltage generated in a current control loop for each power supply via a share bus. These current control loops then regulate the current provided by the corresponding power supplies so that those currents are all proportional to the voltage on the share bus.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: October 15, 2002
    Assignee: Linear Technology Corporation
    Inventors: David Henry Soo, Robert Loren Reay