Patents Represented by Attorney Robinson Intellectual Property Law Office
  • Patent number: 8319219
    Abstract: According to present invention, system on panel without complicating the process of TFT can be realized, and a light-emitting device that can be formed by lower cost than that of the conventional light-emitting device can be provided. A light-emitting device is provided in which a pixel portion is provided with a pixel including a light-emitting element and a TFT for controlling supply of current to the light-emitting element; a TFT included in a drive circuit and a TFT for controlling supply of current to the light-emitting element include a gate electrode, a gate insulating film formed over the gate electrode, a first semiconductor film, which overlaps with the gate electrode via the gate insulating film, a pair of second semiconductor films formed over the first semiconductor film; the pair of second semiconductor films are doped with an impurity to have one conductivity type; and the first semiconductor film is formed by semiamorphous semiconductor.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8319215
    Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. Due to the increase in the numbers of gate lines and signal lines, it is difficult to mount an IC chip having a driver circuit for driving the gate and signal lines by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit for driving the pixel portion are formed over one substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor is used. The driver circuit as well as the pixel portion is provided over the same substrate, whereby manufacturing costs are reduced.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Atsushi Umezaki
  • Patent number: 8318554
    Abstract: In forming a thin film transistor, to form a film superior in quality to a film formed by a conventional CVD method and to form a film equal or superior in quality to a film formed by a thermal oxidation method at a temperature which does not affect a substrate. Plasma oxidation or plasma nitridation with a low electron temperature and a high electron density is performed to at least one of a glass substrate, a semiconductor film containing amorphous silicon formed into a predetermined pattern, a gate electrode and a wire pulled from the gate electrode, an insulating film to be a gate insulating film, and a protective film with a temperature of the glass substrate set at a temperature 100° C. or more lower than a strain point of the glass substrate.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Shunpei Yamazaki
  • Patent number: 8318588
    Abstract: It is an object of the invention is to provide a method suitable for reprocessing a semiconductor substrate having favorable planarity. Another object of the invention is to manufacture a reprocessed semiconductor substrate by using the method suitable for reprocessing a semiconductor substrate having favorable planarity, and to manufacture an SOI substrate by using the reprocessed semiconductor substrate. A projecting portion of a semiconductor substrate is removed using a method capable of selectively removing a semiconductor region which is damaged by ion irradiation or the like. Further, an oxide film is formed on a surface of the semiconductor substrate when the semiconductor substrate is planarized by a polishing treatment typified by a CMP method, whereby the semiconductor substrate is evenly polished at a uniform rate. Moreover, a reprocessed semiconductor substrate is manufactured using the aforementioned method, and an SOI substrate is manufactured using the reprocessed semiconductor substrate.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryota Imahayashi, Hideto Ohnuma
  • Patent number: 8318551
    Abstract: A gate electrode layer over a substrate; a gate insulating layer over the gate electrode layer; a first source electrode layer and a first drain electrode layer over the gate insulating layer; an oxide semiconductor layer over the gate insulating layer; and a second source electrode layer and a second drain electrode layer over the oxide semiconductor layer. A first part, a second part, and a third part of a bottom surface are in contact with the first source electrode layer, the first drain electrode layer, and the gate insulating layer respectively. A first part and a second part of the top surface are in contact with the second source electrode layer and the second drain electrode layer respectively. The first source electrode layer and the first drain electrode layer are electrically connected to the second source electrode layer and the second drain electrode layer respectively.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Toshinari Sasaki
  • Patent number: 8319645
    Abstract: A semiconductor device with a built-in battery whose residual amount of the electrical energy can be detected accurately. The semiconductor device has a battery, a demodulation circuit, a control circuit which generates a signal having information about the residual amount of the electrical energy stored in the battery, and a transmission medium which displays the residual amount of the electrical energy in accordance with the signal. The demodulation circuit demodulates a signal input from an antenna which requests display of the residual amount of the electrical energy. Based on the demodulated signal, the control circuit starts to generate a signal having information about the residual amount of the electrical energy in the battery.
    Type: Grant
    Filed: September 24, 2011
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Osada
  • Patent number: 8319218
    Abstract: An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In2Ga2ZnO7 in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Akiharu Miyanaga, Masahiro Takahashi, Takuya Hirohashi, Takashi Shimazu
  • Patent number: 8319267
    Abstract: A device including a novel nonvolatile memory element is provided. A device including a nonvolatile memory element in which an oxide semiconductor is used as a semiconductor material for a channel formation region. The nonvolatile memory element includes a control gate, a charge accumulation layer which overlaps with the control gate with a first insulating film provided therebetween, and an oxide semiconductor layer formed using an oxide semiconductor material, which overlaps with the charge accumulation layer with a second insulating film provided therebetween.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Yoshinori Ieda, Jun Koyama
  • Patent number: 8319216
    Abstract: It is disclosed that a semiconductor device includes an oxide semiconductor layer provided over a gate insulating layer, a source electrode layer, and a drain electrode layer, in which a thickness of the gate insulating layer located in a region between the source electrode layer and the drain electrode layer is smaller than a thickness of the gate insulating layer provided between the gate electrode layer and at least one of the source electrode layer and the drain electrode layer.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Masashi Tsubuku
  • Patent number: 8319715
    Abstract: A channel forming region of a thin-film transistor is covered with an electrode and wiring line that extends from a source line. As a result, the channel forming region is prevented from being illuminated with light coming from above the thin-film transistor, whereby the characteristics of the thin-film transistor can be made stable.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 8319212
    Abstract: The present invention provides a light-emitting element and a light-emitting device which have high contrast, and specifically, provides a light-emitting device whose contrast is enhanced, not by using a polarizing plate but using a conventional electrode material. Reflection of external light is suppressed by provision of a light-absorbing layer included between a non-light-transmitting electrode and a light-emitting layer. As the light-absorbing layer, a layer is used, which is obtained by adding a halogen atom into a layer including an organic compound and a metal oxide. Further, the light-absorbing layer is formed also over a region in which a thin film transistor for driving a light-emitting element is formed, a region in which a wiring is formed, and the like, and thus light is extracted from the side opposite to the region in which the TFT is formed, thereby reducing reflection of external light.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Ibe, Hisao Ikeda, Junichi Koezuka, Kaoru Kato
  • Patent number: 8319714
    Abstract: It is an object of the invention to provide a display device which performs high grayscale display in accordance with display contents and a game machine with an improved realistic sensation. The invention is a display device characterized by including a pixel portion which performs display based on a video signal and a driver circuit portion inputted with the video signal, wherein the driver circuit portion has a unit for controlling a grayscale in accordance with display of the pixel portion. In a liquid crystal display device, luminance of a lighting unit is controlled based on a signal from the unit for controlling a grayscale whereas a current supplied to a light emitting element is controlled in a light emitting device. By applying such a display device to a game machine, a realistic sensation can be improved.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: November 27, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yu Kojima, Yuko Tachimura, Shunpei Yamazaki, Yoshifumi Tanada
  • Patent number: 8314426
    Abstract: There is disclosed a semiconductor device and a method of fabricating the semiconductor device in which a heat treatment time required for crystal growth is shortened and a process is simplified. Two catalytic element introduction regions are arranged at both sides of one active layer and crystallization is made. A boundary portion where crystal growth from one catalytic element introduction region meets crystal growth from the other catalytic element introduction region is formed in a region which becomes a source region or drain region.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Chiho Kokubo, Hirokazu Yamagata, Shunpei Yamazaki
  • Patent number: 8315288
    Abstract: To reduce the laser threshold by efficiently exciting a light-emitting body in a solid-state dye laser with light having high density, thereby facilitating emission of laser beams, and to miniaturize a solid-state dye laser including an excitation light source. A solid-state dye laser capable of emitting laser beams by efficiently introducing light from an excitation light source to a light-emitting body incorporated in an optical resonator structure and exciting the light-emitting body with light with high density, is realized.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mikio Yukawa, Tetsuo Tsutsui
  • Patent number: 8313975
    Abstract: The purpose is manufacturing a photoelectric conversion device with excellent photoelectric conversion characteristics typified by a solar cell with effective use of a silicon material. A single crystal silicon layer is irradiated with a laser beam through an optical modulator to form an uneven structure on a surface thereof. The single crystal silicon layer is obtained in the following manner; an embrittlement layer is formed in a single crystal silicon substrate; one surface of a supporting substrate and one surface of an insulating layer formed over the single crystal silicon substrate are disposed to be in contact and bonded; heat treatment is performed; and the single crystal silicon layer is formed over the supporting substrate by separating part of the single crystal silicon substrate fixed to the supporting substrate along the embrittlement layer or a periphery of the embrittlement layer.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Fumito Isaka, Sho Kato, Junpei Momo
  • Patent number: 8314754
    Abstract: Variation occurs in transistor characteristics. The present invention relates to a signal line driver circuit comprising a plurality of current source circuits respectively corresponding to a plurality of wirings, characterized in that: the plurality of current source circuits each comprise capacitor means and supply means; and the plurality of current source circuits each convert a supplied current into a voltage in accordance with a video signal, and supply a current corresponding to the converted voltage.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 8314012
    Abstract: An SOI substrate having a single crystal semiconductor layer with high surface planarity is manufactured. A semiconductor substrate is doped with hydrogen, whereby a damaged region which contains large quantity of hydrogen is formed. After a single crystal semiconductor substrate and a supporting substrate are bonded together, the semiconductor substrate is heated, whereby the single crystal semiconductor substrate is separated in the damaged region. While a heated high-purity nitrogen gas is sprayed on a separation plane of the single crystal semiconductor layer separated from the single crystal semiconductor substrate, laser beam irradiation is performed. By irradiation with a laser beam, the single crystal semiconductor layer is melted, whereby planarity of the surface of the single crystal semiconductor layer is improved and re-single-crystallization is performed.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8314417
    Abstract: The present invention provides a memory device which has a memory element having a simple structure in which a composition layer is sandwiched between a pair of conductive layers. With this characteristic, a memory device which is involatile, easily manufactured, and additionally recordable can be provided. A memory device of the present invention has plural memory cells, plural bit lines extending in a first direction, and plural word lines extending in a second direction which is perpendicular to the first direction. Each of the plural memory cells has a memory element. The memory element comprises a first conductive layer forming the bit line, a second conductive layer forming the word line, and a composition layer to be hardened by an optical action. The composition layer is formed between a first conductive layer and a second conductive layer.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryoji Nomura, Yasuko Watanabe, Yoshitaka Moriya
  • Patent number: 8316042
    Abstract: A roadside device (15) is provided with a corresponding table in the case where there is an item of a new version of a taste data table to take over from user taste information in an item of an old version of the taste data table. In the corresponding table, item numbers “52”, “53”, “62” and “63” in the old version of the taste table, for example, are made to correspond to item numbers “52”, “53” and “63” in the new version of the taste table. An ITS vehicle-mounted device (17) sets user taste data in the item numbers of the old version corresponding to the item numbers of the new version to default values of the items in the new version for a transmitting-destination user of the taste data table of the new version and transmits the default data to an ITS vehicle-mounted device (17) of the transmitting-destination user.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: November 20, 2012
    Assignee: Kabushiki Kaisha Kenwood
    Inventors: Hideyuki Nagatomo, Hiroyuki Suzuki, Nobuyuki Hotta, Hideo Shimoshimano, Takuya Ogura
  • Patent number: 8314010
    Abstract: There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: November 20, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki