Abstract: A dual storage cell is disclosed, which utilizes memory cells of cross-coupled inverters together with isolation transistors coupled between the driver transistors of the inverters and the reference supply node. Transfer circuitry is included in the dual storage cell, which couples one of the data nodes of the destination memory cell to a power supply node responsive to a transfer enable signal, and responsive to the data state of the source memory cell. During the transfer operation, the isolation transistors in the destination cell are turned off so that the cross-coupled inverters are not biased to the reference supply node. This allows the data transfer to occur without a DC current path between the power supply node and the reference supply node. The preferred implementation uses complementary transistors for the isolation transistors relative to the transfer devices, and to connect the gates together to the transfer enable signal.