Abstract: A server with an improved connecting port is provided. The server comprises a casing, a fastening module and a connecting port. The fastening module is disposed in an internal receiving space of the casing and further comprises a fastening base plate with a first through hole, a first fastening plate with a second through hole, and a second fastening plate with a third through hole. The connecting port has two ends connected to two engaging wings, respectively. The connecting port is inserted into the first through hole, the second through hole, and the third through hole. The engaging wings are embedded in the second through hole and held by and between the fastening base plate and the second fastening plate.

Abstract: A switching mechanism for a camera includes: a control unit; a driving device coupled with and actuated by the control unit; a first gear set coupled with the driving device; a second gear coupled with the first gear set and centrally provided with a rotary shaft having a shaft hole formed with threads; a spindle being female-connected to the shaft hole and which has an axial surface formed with outer threads corresponding to the threads of the shaft hole, thus allowing the second gear to move along and relative to the spindle; and a translation member positioned perpendicular to the spindle and provided with a rack for engaging with the second gear and thus driving the translation member to move perpendicular to the spindle. The second gear drives or does not drive the rack as the engagement therebetween is made or broken.

Abstract: Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

Abstract: High integration of a non-volatile memory device (NVMD) is disclosed. According to one aspect of the present invention, a non-volatile memory device comprises an intelligent non-volatile memory (NVM) controller and an intelligent non-volatile memory module. The NVM controller includes a central processing unit (CPU) configured to handle data transfer operations to the NVM module to ensure source synchronous interface, interleaved data operations and block abstracted addressing. The intelligent NVM module includes an interface logic, a block address manager and at least one non-volatile memory array. The interface logic is configured to handle physical block management. The block address manager is configured to ensure a physical address is converted to a transformed address that is accessible to the CPU of the intelligent NVM controller. The transformed address may be an address in blocks, pages, sectors or bytes either logically or physically.

Abstract: Solid state drive (SSD) testing processes and methods are disclosed.

Abstract: A self-sealed medical sterilization pouch comprises the following elements of: a first sheet being pervious to sterilization gases and surrounded by at least one printing domain thereon, a plurality of signs being disposed on the printing domain and located outside of a closed space, the first sheet having at least two sterile processing indicators having color response, one surface of an end of the first sheet having a flap; and a second sheet being impervious to sterilization gases, the second sheet having an opening and being joined with the first sheet by a first seal line, a second seal line and a third seal line at a left side, a right side and an upper side to form the closed space, the sterile processing indicators being disposed between the third seal line and a ladle-shaped end and the third seal line and another ladle-shaped end respectively.

Abstract: Data error detection and correction in non-volatile memory devices are disclosed. Data error detection and correction can be performed with software, hardware or a combination of both. Generally an error corrector is referred to as an ECC (error correction code). One of the most relevant codes using in non-volatile memory devices is based on BCH (Bose, Ray-Chaudhuri, Hocquenghem) code. In order to correct reasonable number (e.g., up to 8-bit (eight-bit)) of random errors in a chunk of data (e.g., a codeword of 4200-bit with 4096-bit information data), a BCH(4200,4096,8) is used in GF(213). ECC comprises encoder and decoder. The decoder further comprises a plurality of error detectors and one error corrector. The plurality of error decoders is configured for calculating odd terms of syndrome polynomial for multiple channels in parallel, while the error corrector is configured for sequentially calculating even terms of syndrome polynomial, key solver and error location.

Abstract: A waterproof rotary switch includes a holder base that has hooks extending from the periphery, a switching component set that is mounted on the holder base and has a fixed metal terminal with a fixed contact, a movable metal terminal with a movable contact, and two conductors respectively connected to the fixed metal terminal and the movable metal terminal, an actuator that is mounted in the holder base and has an actuating portion rotatable with the actuator to move the movable contact of the movable metal terminal into contact the fixed contact of the fixed metal terminal to close the circuit or away from the fixed contact of the fixed metal terminal to open the circuit, and a top cover that covers the holder base to hold the switching component set and the actuator on the holder base and has a plurality of hook holes that receive the hooks of the holder base respectively and a plurality of wire slots for the passing of the conductors and a top wall sloping downwardly outwards to the periphery of the top co

Abstract: A Class-D power amplifier having a distortion-suppressing function includes a gain control unit, a first PWM unit, a second PWM unit, a current control unit, and a level control unit. The level control unit includes at least one D flip-flop and at least one XNOR gate. The D flip-flop has an output end coupled with the gain control unit and an R end coupled with an output end of the XNOR gate. When the Class-D power amplifier has its positive output end and negative output end respectively and simultaneously outputting a high-level signal and a low-level signal to the XNOR gate, the XNOR gate outputs the high-level signal to the D flip-flop. Then the D flip-flop outputs the high-level signal to the gain control unit as feedback for controlling the gain control unit to reduce audio gain, thereby suppressing audio distortion.

Abstract: A DisplayPort socket includes a first composite element and a second composite element. The first composite element includes a first insulating body partially and tightly covering plural terminals so that the terminals are exposed on a plate of the first insulating body and form plural conduction zones. The second composite element includes a second insulating body partially and tightly covering plural terminals so that the terminals are exposed on a plate of the second insulating body and form plural conduction zones. The plates of the first and second composite elements are stacked flat on each other to form a coupling plate for coupling buttingly with a DisplayPort connector. By integrating the first and second insulating bodies with their corresponding terminals to form the first and second composite elements and then assembling the first and second composite elements together, the terminals are securely positioned, thus increasing the reliability of the socket.

Abstract: A compensating circuit board connector for connecting two adjacent circuit boards includes two sockets and a jumper. Each socket includes at least one receiving terminal having a conducting portion with two opposite sidewalls. The sockets are disposed on the circuit boards, respectively, so the conducting portions of the receiving terminals of the sockets jointly form an accommodating space. The jumper is mated with the sockets and includes at least one jumper terminal. The jumper terminal, configured for being received in the accommodating space, includes a frame and two resilient portions. The frame, narrower than a spacing between the opposite sidewalls of each receiving terminal, extends through the conducting portions of the receiving terminals of the sockets. The resilient portions, provided respectively at two ends of the frame, extend outward to each press against the opposite sidewalls of the corresponding receiving terminal, thereby electrically connecting the receiving terminals of the sockets.

Abstract: High performance flash memory devices (FMD) are described. According to one exemplary embodiment of the invention, a high performance FMD includes an I/O interface, a FMD controller, and at least one non-volatile memory module along with corresponding at least one channel controller. The I/O interface is configured to connect the high performance FMD to a host computing device The FMD contoller is configured to control data transfer (e.g., data reading, data writing/programming, and data erasing) operations between the host computing device and the non-volatile memory module. The at least one non-volatile memory module, comprising one or more non-volatile memory chips, is configured as a secondary storage for the host computing device. The at least one channel controller is configured to ensure proper and efficient data transfer between a set of data buffers located in the FMD controller and the at least one non-volatile memory module.

Abstract: Systems and methods of manufacturing and testing non-volatile memory (NVM) devices are described. According to one exemplary embodiment, a function test during manufacturing of the NVM modules is conducted with a system comprises a computer and a NVM tester coupling to the computer via an external bus. The NVM tester comprises a plurality of slots. Each of the slots is configured to accommodate respective one of the NVM modules to be tested. The NVM tester is configured to include an input/output interface, a microcontroller with associated RAM and ROM, a data generator, an address generator, a comparator, a comparison status storage space, a test result indicator and a NVM module detector. The data generator generates a repeatable sequence of data bits as a test vector. The known test vector is written to NVM of the NVM module under test. The known test vector is then compared with the data retrieved from the NVM module.

Abstract: Wind musical instrument moisture drying devices are disclosed. The device includes a core member, a base member and an optional flexible adaptor member. The core member includes a hollow enclosure, a fan, an electric energy source and a fan operations control unit. The fan is mounted on top of the hollow enclosure, while the electric energy source and the fan operations control unit are housed inside. The base member contains at least one extrusion element located on the surface of the hollow enclosure substantially near the bottom. The extrusion element is configured to be orientated radially outward from the centerline of the hollow enclosure. The core member and the base member can be fixedly connected to each other, or connected via a connecting device. The flexible adaptor member is configured for receiving the based member to be flexibly adjusted or reshaped to be snuggled with inside surface of a wind musical instrument.

Abstract: Techniques for managing multi-dimensional spatial data are disclosed. The multi-dimensional spatial data include, but are not limited to, two- and three-dimensional imagery data, video clips, motion picture files and movies. In particular, the present invention enables the user to match sub-regions of query data with stored spatial data in a database using foveal indices. According to one aspect of the present invention, the multi-dimensional spatial data is encoded with the following technique, which segments the spatial data into overlapping samples (“foveal samples”), represents foveal samples as polar-domain foveals in a polar coordinate system, processes the foveals into a scale- and rotation-invariant canonical form (“canonical foveal”), extracts features from foveals using a mathematical transform (e.g., wavelet, beamlet), and generates and stores a set of foveal indices for each canonical foveal matching application criteria.