Patents Represented by Attorney Ron Meetin

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  • High density trench isolation for MOS circuits
    Patent number: 5179038
    Abstract: A method of forming isolation trenches in CMOS integrated circuits is disclosed. The trench side walls are covered by a thin oxide layer, and the trenches are filled with a highly doped polysilicon. The doped polysilicon has a high work function which prevents oxide charges from inverting the trench side walls and thereby turns off the parasitic transistors at these side walls to reduce latchup.
    Type: Grant
    Filed: December 22, 1989
    Date of Patent: January 12, 1993
    Assignee: North American Philips Corp., Signetics Division
    Inventors: Wayne I. Kinney, John P. Niemi, Jonathan E. Macro, David Back