Abstract: The invention relates to a data processing device for recovering digital data which is received in an analogue transmitted signal. According to the invention, the received signal is digitized and a threshold is determined in a threshold estimator. The interference in the channel is corrected in a downstream adaptive equalizer, and a bit clock generator produces the correct sampling rate and phase for the data of a line. The threshold estimator is used to determine the mean value of an input signal for each line, and this value is then taken as the optimum decision value for sampling the data bits for this line. By using an adaptive equalizer, it is possible to correct different types of distortion, caused by the transmission channel, without the need for a training signal. The data processing device according to the invention can thus be used universally for all digital additional signals occurring in a television signal, for example.

Abstract: A system and method for processing a channel entry is presented. In one embodiment, the receiving mode of an apparatus is first determined. A first channel entry format is then displayed, if it is determined that the apparatus in the first receiving mode. A second channel entry format is displayed, instead, if it is determined that the apparatus in the second receiving mode. Furthermore, the first channel entry format comprises a first and a second information portions and the second channel entry format comprises a third information portion.

Abstract: A receiver for processing a VSB modulated signal containing terrestrial broadcast high definition television information and a pilot component includes a carrier recovery network (22; FIG. 3) that produces a demodulated baseband signal. The carrier recovery network additionally responds to a locally generated control signal (Ph. Offset; 360) representing an unwanted phase offset of the pilot signal due to multipath distortion, for example. The control signal is used to compensate for the pilot phase offset before the demodulated signal is equalized. The control signal is produced by correlating received sync values with both a reference sync value (362) and a Hilbert transform of the reference sync value (363). The output of the carrier recovery network signal is phase compensated twice.

Abstract: An Orthogonal Frequency Division Multiplexing (OFDM) receiver that detects and corrects a carrier frequency offset of a received signal is provided. The OFDM receiver samples an incoming signal in the time domain and correlates the samples with a stored version of a training or reference symbol to generate a correlation sequence. A correlation peak is detected in the correlation sequence and the index of the correlation peak is set as a reference point. The OFDM receiver acquires a sample of the incoming signal that is a predetermined distance from the reference point. Next, the phase difference between the acquired sample and the local oscillator is computed. Afterwards, the frequency of the local oscillator is adjusted to reduce the computed phase difference. The acquired sample has a known phase that is equal to the phase of the local oscillator in the absence of a carrier frequency offset.

Abstract: A receiver for processing a VSB modulated signal containing terrestrial broadcast high definition television information and a pilot component includes an input analog-to-digital converter (19) for producing a datastream which is oversampled at twice the received symbol rate, and a digital demodulator (22; FIG. 3) with a data reduction network (330, 332) in a phase control loop. A segment sync detector (24; FIG. 4, 5) uses an abbreviated correlation reference pattern to recover a twice symbol rate sampling clock for the digital converter (19). A DC offset associated with the pilot component is removed (26; FIG. 6) from the demodulated signal before it is applied to an NTSC interference detection network (30; FIG. 7). The interference detection network includes a comb filter network (710, 718) responsive to a twice symbol rate sampled data datastream, and exhibits a sample delay dimensioned to avoid aliasing in the combed frequency spectrum (FIG.

Abstract: An adaptive channel equalizer (50) for processing a demodulated VSB signal containing terrestrial broadcast high definition television information operates adaptively in blind, training, and decision-directed modes. The VSB signal is characterized by a data frame format (FIG. 2) constituted by a succession of data fields each containing a data segment prefaced by a field sync segment. Equalization is expedited by recycling (35) received training data through the equalizer more than once during a VSB data field after a field sync segment is detected.

Abstract: A method of extracting regions of homogeneous texture in a digital picture divides the digital picture into blocks, and for each block generates a feature vector as a function of the data moments. From the feature vectors a gradient for each block is extracted in one of two ways, either using a weighted Euclidean distance between the feature vectors or a probability mass function-based distance metric. The gradients are submitted to morphological preprocessing to remove small bumps in the gradient field. A watershed algorithm is then applied to the preprocessed gradient field to segment the gradient field into a set of spatially connected regions of homogeneous texture.

Abstract: An optical sensor for a telecine application having a first group of odd sensor elements and a second group of even sensor elements where each sensor element is associated with a control electrode that controls the operation of the associated sensor element. An auxiliary control electrode is also associated with sensor elements of one of the two groups with a charge summing element being coupled to adjacent sensor elements assigned to the first and second group.

Abstract: Compression and decompression apparatus and methods for producing fixed-length compressed data blocks with variable-length compression are described. The compression system receives an N-bit word from a data block and determines the variable compression length for the word. A bit counter keeps track of the number of bits remaining and determines if sufficient bits have been used to ensure that the fixed-length compressed data block will be filled. If so, the compressed word is output. If not, prior to output the compressed word is padded with an appropriate number of bits, which may be null bits.

Abstract: A disclosed processing device, including an on-screen User interface display, incorporates a means for generating a display of a plurality of hierarchically ordered menus. The menus include a current menu) and a preceding parent menu showing a selection path from the parent menu to the current menu. Also a menu selection item within the hierarchical menu display provides a User at least one of, a) a display of control information for the device, and b) control parameter data entry capability. The processing device also incorporates a means for updating the on-screen display in response to User menu item selection. The processing device may also include a means for altering the device operation in response to an updated operating parameter value. Also, the selection path may indicate menu entry and exit points separated by at least one intervening menu item.

Abstract: A picture compression process, especially of the MPEG2 type, in which each picture macroblock (10) is subjected to a coding chosen, for each macroblock, from among several types of coding.

Abstract: A programmable frequency multiplier receives data representing a desired multiplication ratio from a first configuration register. The ratio data is transferred to the frequency multiplier concurrently with the generation of an internal delayed reset signal which holds all configuration registers in a reset condition until the frequency multiplier achieves a locked state. The configuration registers are dependent upon the internal clock signal generated by the frequency multiplier for proper operation. By causing the configuration registers to renew operation only after the stable frequency multiplier operation the danger of corrupting the information in the configuration registers is minimized.

Abstract: A device for regulating bit rate in a system for statistically multiplexing several streams of MPEG 2 coded images is disclosed. The statistical multiplexing system includes a device (1) for allocating bit rate using the complexity calculated by a bit rate regulating device (10). Each coder E(i) of an image stream includes a first coding device (20) for performing spatial coding, a second coding device and a memory for storing the complexity X1st| of the last image coded spatially by the first coding device. The complexity (X−GOP) of the last group of pictures is coded by the second coding device (30). Device (10) regulates the bit rate of coder E(i) for determining the complexity value for the next image coded by the second coding device (30), using stored complexity values. This complexity value is transmitted to the bit rate allocator (1) to determine the next bit rate sent to the coder E(i).

Abstract: According to the invention a method is proposed introducing a temporarily erased flag and two offset values (TE_S_OFF, TE_E_OFF) in order to indicate a cell to be temporarily erased and exactly address the Stream Object Units (SOBU), which can be erased completely. Permanent erasure on the fly without any additional view into the streams or quick permanent erasure can be achieved. Advantageously the temporarily erasure can be withdrawn completely also.

Abstract: An Orthogonal Frequency Division Multiplexing (OFDM) receiver that compensates for FFT window drift by extracting pilots from a fast Fourier transformed and equalized OFDM signal, and processing the extracted pilots to derive an FFT window adjustment factor and an associated equalizer tap adjustment value. The OFDM receiver simultaneously controls the position of an FFT window and the phase of equalizer taps using the derived FFT adjustment factor and equalizer tap adjustment value.

Abstract: The present invention is directed towards detecting contouring artifacts in a received video signal and reducing the detected artifacts by dithering and/or by adding least significant bits to selected pixels in the video signal. The contouring artifacts are detected by applying a magnitude difference test and/or an averaging test to a predetermined pixel span. The artifacts are reduced by substituting a replacement pixel for a selected pixel in the pixel span. A replacement pixel is generated by calculating an average pixel value for the predetermined pixel span, by reducing (e.g., rounding or truncated) the average pixel value to a bit resolution that is greater than the bit resolution of the pixels in the predetermined pixel span, or by adding a dither signal to the average pixel value.

Abstract: A memory management process for buffering progressive, interlaced, CCIR 601/656 compliant, and MPEG compliant video signals in a video memory that is partitioned into first and second buffers. The process includes identifying the format of a received video signal, buffering the received video signal in the video memory in accordance with a standard buffering mode if the video signal is in an interlaced, CCIR 601/656 compliant, or MPEG compliant format, and buffering the received video signal in the video memory in accordance with an override buffering mode if the video signal is in a progressive format such as a 240p signal generated by a game console, VCR, cable text generator, and the like.

Abstract: The process for storing, in pages of a memory, image blocks (h, v) consisting of v lines of h pixels, for the reading of image blocks (H, V) consisting of V lines of H pixels, is characterized in that the horizontal shift DI, I+a, in terms of number of blocks (h, v), of the boundary of a page corresponding to any row I of the image with respect to the boundary of a page corresponding to a row I+a is equal to: DI, I+a=a D, ∀ positive integer a less than RM=INT [(V−2)/v]+2, (INT corresponding to the integer part of the division) the value D, which corresponds to the shift between two successive rows being chosen such that: D≧(BM−1), with BM=INT [(H−2)/h]+2. Applications relate, for example to motion estimation and motion compression.

Abstract: The process is characterized in that it stores a position of the write pointer PW on receipt of the synchronization signal S1 relating to the input signal so as to provide a value PW-IN, and on receipt of the synchronization signal S2 relating to the output signal so as to provide a value PW-OUT, in that it dynamically calculates an interpolation phase &agr; (12, 13, 14, 15) such that: α = P W ⁢   ⁢ _OUT - P W ⁢   ⁢ _IN Δ ⁢  

Abstract: In a device for controlling the displaying of characters for a video system, the memory for storing information relating to the displaying of the characters is partitioned into two areas. The first area (Z1, Z1′) is for storing, at fixed addresses, data and parameters for general control of the display. The second area (Z2) which is divisible into spaces (B1, B2, B3) of variable sizes stores, in each of the spaces, control parameters and data relating to the displaying of a row of characters, wherein the spaces are chained together by virtue of a parameter, the address of the next memory space, stored in each space. This memory architecture offers multiple possibilities for modifying the display parameters from one row to another within one and the same “screen” whilst optimizig the size of the memory used.