Abstract: A high efficiency digital integrate and dump circuit with a digital output is provided for recovering digital information from an analog input signal. The circuit utilizes a method of preprocessing the input signal in such a manner as to eliminate the need for a separate dump cycle. An integration cycle is provided which includes an integrator for performing integration, the output of which provides a constant preprocessing input that is added to the analog input signal for preprocessing purposes. The integrated output is converted from analog to digital with an analog-to-digital converter. The digitized integrated output then undergoes a postprocessing cycle whereby the previously added bi-level preprocessing input's integral is subtracted from the digitized integrated output. The difference between clocked digital integrated output is measured and provided as the integrated response.