Abstract: A client application (16) establishes in a client network (10), a first connection having a first security level, directly with a first port (1) of a server application (17) hosted in a server machine (13) linked to a server network (11), in order to send messages addressed to the server machine (13). The messages pass from the client network (10) to the server network (11) through a network layer (CR) of a gateway machine (9). In the gateway machine, a secure application proxy reroutes the messages from the first connection, in a way that is transparent for the client application, and establishes a second connection having a second security level with the server application; the second connection is unknown to the client application.
Type:
Grant
Filed:
January 24, 2001
Date of Patent:
December 6, 2011
Inventors:
François Cunchon, Rene Martin, Van-Dung N'Guyen
Abstract: An improved portable device for start-up of a computer system is disclosed. This portable device for externally starting up a computer system comprises a connection interface to the computer system and a data medium comprising data and executable codes of a host operating system that can be activated by a start-up program of the computer system and configured to automatically detect hardware and/or software elements of the computer system and to activate the corresponding computer drivers. The data medium further comprises data and executable codes of a management software interface, configured to present the computer drivers activated by the host operating system in the form of at least one predetermined generic computer driver, and data and executable codes of a guest operating system that can be activated by the management software interface and configured to manage the hardware and/or software elements on the computer system using the predetermined generic computer driver.
Abstract: A connection arrangement for a mainboard having at least one memory card connected to a processor and two series of FBD memory modules connected to respective FBD channels in the memory card by means of FBD connectors using a daisy-chain arrangement. Each channel of the memory card is connected to a linking module to another card the linking module receives two separate FBD channels and includes a FBD type connector with two series of electrical contact pins respectively connected to two paired channels of the memory card. The FBD connector is mounted on the back of the memory card so as to be associated with a connection interface providing the connection to a mainboard. The mainboard is also equipped with a connector of the FBD type designed for inter-card connection.
Abstract: Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.
Type:
Grant
Filed:
April 17, 2008
Date of Patent:
March 30, 2010
Inventors:
Russell W. Guenthner, Sidney L Andress, John Heath
Abstract: As fast and powerful commodity processors have been developed, it has become practical to emulate on platforms built using commodity processors the proprietary hardware systems of powerful older computers. High performance is typically a key requirement for a system even when built using emulation software. In a hardware design many special cases and conditions which may cause exceptions are detected by logic operating in parallel with the instruction execution. In software these checks can cost extra cycles of processor time during emulation of each instruction and be a significant detriment to performance. Avoiding some of these checks by relying upon the underlying hardware checks of the host system and then using a signal handler and special software to recover from these signals is a way to improve the performance and simplify the coding of the software emulation system.
Type:
Grant
Filed:
December 29, 2005
Date of Patent:
March 23, 2010
Assignee:
Bull HN Information Systems Inc.
Inventors:
Russell W. Guenthner, Stefan R. Bohult, David W. Selway, Clinton B. Eckard
Abstract: As fast and powerful commodity processors have been developed, it has become practical to emulate the proprietary hardware systems of powerful older computers on platforms built using commodity processors. The systems being emulated are often large mainframe computers with large numbers of disks, communications systems and other attached hardware. Because of the size and expense, and also because databases involved must reside in only one location, it is difficult to replicate these systems for testing, development, debug or for providing alternative options to customers. A method for providing a single emulated computer system which provides for multiple views or options in control of the emulator is disclosed in which the options are dependent and selected based on job or user basis. The mechanism continues to provide for high performance and a single copy of the operating system with multiple processes, jobs and threads being emulated under user controlled parameters.
Type:
Grant
Filed:
December 29, 2005
Date of Patent:
January 26, 2010
Inventors:
Russell W. Guenther, Clinton B. Eckard, David W. Selway
Abstract: An encryption circuit for simultaneously processing various encryption algorithms, the circuit being capable of being coupled with a host system hosted by a computing machine. The circuit comprises an input/output module responsible for the data exchanges between the host system and the circuit via a dedicated bus. An encryption module coupled with the input/output module is in charge of the encryption and decryption operations. Isolation means between the input/output module and the encryption module makes the sensitive information stored in the encryption module inaccessible to the host system and ensures the parallelism of the operations performed by the input/output module and the encryption module. The circuit is supported on a peripheral component interconnect card. The circuit is specifically adapted to provide “hardware” protection of computer servers or stations.