Abstract: An apparatus for and method of generating and linearly controlling periodic bipolar drive signals to drive an electromechanical device, such as a DC motor. The apparatus comprises side-by-side coaxial primary and secondary cylindrical commutators electrically connected together by a pair of diametrically opposed motor-driven brushes riding on the exterior surface of the commutators, each commutator having matched half-cylinder conductive sections separated by insulation at the common joints. The rotational position of the secondary commutator is adjustable relative to the primary commutator by a stepper motor mechanically coupled to it. A DC source is connected across the primary commutator and the electromechanical load is connected across the secondary commutator. Power of adjustable polarity duty cycle is commutated from the DC source to the load by the pair of rotating brushes.

Abstract: A surface-mounted apparatus for holding an elongated hand-held instrument, such as a vacuum wand, when not in use, the instrument having a flexible tube-like extension attached to the end inserted in the apparatus, the apparatus comprising an elongated cylindrical shell affixed to a mounting plate, the cylindrical shell having a smoothly tapered longitudinal slot extending from an upper end to near the lower end of the shell, the slot of width sufficient to allow unconstrained passage of the tube-like extension, and the shell of inner diameter sufficient to easily accommodate insertion of the end to be inserted into the shell provided the instrument is rotated to align the extension to pass through the slot during insertion, the mounting plate used to attach the apparatus to a surface in an orientation favorable to the use of the force of gravity to cradle the instrument in the shell against random dislodging forces.

Abstract: A circuit for use on an integrated circuit chip for detecting the operative connection of a crystal used to control an on-chip crystal controlled oscillator, which generates a cyclical clock signal, by detecting the presence or absence, respectively, of the cyclical clock signal and for providing an output control signal in response thereto to an on-chip terminal pad control circuit which automatically enables an on-chip terminal pad to be utilized as a clock signal output terminal pad if the cyclical clock signal presence is detected or as a clock signal input terminal pad otherwise. Also, a method of automatically switching the function of a terminal pad on an integrated circuit chip to function as a clock signal output terminal pad or as a clock signal input terminal pad in accordance with detecting the existence or non-existence of a cyclical clock signal generated on-chip.

Abstract: A semiconductor circuit and method for comparing an input signal voltage level against the circuit's supply voltage level and for providing a corresponding binary output signal, the circuit comprising first and second semiconductor devices for establishing voltage levels corresponding to the compared voltage levels on first and second nodes, respectively, third, fourth, fifth, and sixth semiconductor devices in combination with third, fourth, and fifth nodes arranged and connected to operate as a bistable element which is predisposed during a first time interval to favor one of the binary states in response to the difference in voltage levels established on the first and second nodes, and through the action of a seventh semiconductor device, which switches the main conductive path through the circuit off during the first interval and on during a second time interval, effecting a regenerative toggling of the bistable element to the favored state during the second time interval causing the desired binary signal

Abstract: The invention is directed to an apparatus adapted for flexible electrical interconnection between first and second rigid circuit systems, the systems being desirably isolated thermally from each other against heat energy tending undesirably to transfer between the systems, comprising in combination, a first flexible electrical conductor extending outwardly of the first circuit system to terminate in a first end, a second flexible electrical conductor extending outwardly of the second circuit system to terminate in a second end, and a third flexible electrical conductor bridging at least the first and second ends to provide the flexible electrical interconnection between the first and second systems and characterized by low thermal conductivity relative to at least one of the first and second conductors to thermally isolate the systems. Also included are methods for providing the flexible electrical interconnection between first and second rigid circuit systems.

Abstract: Apparatus for storing and retrieving data, comprising a plurality of electrochromic cells having electrically controllable illumination transparency, a voltage source coupled to each electrochromic cell to provide control and bias signals thereto for electrically controlling the illumination transparency of selected ones of the cells in accordance with data to be stored, a light source providing flood illumination upon the plurality of electrochromic cells, and a charge transfer device comprising a plurality of charge transfer device cells for photodetecting illumination from the light source which passes through the then transparent electrochromic cells to effect the retrieval of data stored in the transparency of the plurality of electrochromic cells.

Abstract: A high-voltage sensing logic circuit for detecting the occurrence of an input signal level applied to the circuit which exceeds a predetermined threshold voltage level and for providing a unique output signal level in response thereto, the circuit adapted to operate over first and second time intervals from a voltage source providing supply and reference voltage levels wherein first and second chargeable devices with first terminals connected to form a common node are charged to substantially the supply voltage level at the common node during the first time interval. The first chargeable device has a second terminal to which is alternately applied reference and supply voltage levels during the first and second time intervals, respectively. The second chargeable device has a second terminal connected to a second node.

Abstract: A low-power address decode logic circuit capable of and a method for decoding input address signals and for providing appropriate output address driver signals for retrieving selectively contents stored in memory. A first chargeable device connected to a first node is charged to provide that node with a logic high voltage level during the first of three successive time intervals, is allowed to remain charged or is discharged to provide a logic low voltage level on the first node in accordance with the decoded output of an input NOR gate which decodes the input address signals, while simultaneously gating to an output bootstrap driver a portion of the charge stored on the first chargeable device to cause a desired logic state voltage level to be stored in the driver during the second time interval, and using this logic state voltage level stored in the driver to bootstrap control the output address driver signal during the third time interval.

Abstract: A frequency control system with a phase-locked loop for automatically adjusting the frequency of an alternating signal and an external signal derived coherently therefrom to the variant zero phase-shift frequency of a phase shifter adapted to receive the external signal, the control system comprising: a phase shifter responsive to the external signal for introducing a frequency sensitive bipolar phase-shift to the external signal to produce a phase shifted external signal thereat, the phase shifter introducing zero phase-shift at a drift-prone frequency, f.sub.o ; an alternating signal source for generating the alternating signal of adjustable frequency covering a range of frequencies including frequency, f.sub.

Abstract: The subject invention conserves memory real estate by employing ROM cells which are FETs or non-FETs depending upon the programming. Each cell comprises a gate, a source and drain region and provision for connections to bit and word lines. Programming is achieved by a mask which permits doping of the source and drain regions to comprise FETs for the cells indicative of one state of logic while precluding doping of the source and drain regions to complete the channel in the cells comprising the other state of logic. Also, the FETs are fabricated, their contacts extending linearly between bit lines which are preferably diffused lines, and the word line making direct contact with gates of the linear cells. The process simplifies the number of steps required to manufacture the FETs and non-FETs by simply providing the programming after the basic cells are formed. Such unprogrammed structures may be inventoried and simply programmed i.e.

Abstract: Apparatus for controlling the spatial orientation of an angularly displacable working head supported by a base and relative to a given frame of reference.

Abstract: A method of making complementary n-channel and p-channel metal oxide semiconductor (CMOS) device pairs in a common insulatively supported semiconductor layer, including simultaneously converting by exposure to an ion beam adjacently arranged complementary regions in different members of a device pair in said layer from a first to a second conductivity type.