Abstract: An integrated circuit may include a plurality of sub bit line groups, each sub bit line group coupled to a different main bit line by a corresponding access device; and a plurality of programmable impedance elements arranged into element groups, each element group being coupled to a corresponding each sub bit line.
Type:
Grant
Filed:
April 26, 2010
Date of Patent:
October 23, 2012
Assignee:
Adesto Technologies Corporation
Inventors:
Narbeh Derhacobian, Shane Charles Hollmer, John Dinh